crunch.s

CIRRUS 公司EP93XX系列CPU的WINCE下的BSP

;**********************************************************************
;                                                                      
; Filename: crunch.s
;                                                                      
; Description: Includes routines for the context switch save and restore
;              registers for the crunch engine.
;
; THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
; ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
; PARTICULAR PURPOSE.
;
; Use of this source code is subject to the terms of the Cirrus end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to 
; use this source code. For a copy of the EULA, please see the 
; EULA.RTF on your install media.
;
; Copyright(c) Cirrus Logic Corporation 2002, All Rights Reserved                       
;                                                                      
;**********************************************************************

            OPT     2       ; disable listing
            INCLUDE kxarm.h
            INCLUDE armmacros.s
            INCLUDE crunchmacros.inc
            OPT     1       ; reenable listing
            OPT     128     ; disable listing of macro expansions

CRUNCH_SAVESIZE        EQU   0xB8

            TEXTAREA

;**********************************************************************
;
;  void OEMInitCoProcRegisterSavedArea( LPBYTE pArea );
;
;  This function is called by the kernel when a thread is created to 
;  initialize the debug registers. 
;
;  r0 - Buffer that will be used to save/restore debug registers. 
;       The initialized value will be passed directly to 
;       OEMRestoreCoProcRegister when the thread is first scheduled. 
;
;  Currently we don't have any debug coprocessor registers.
;
;**********************************************************************

            LEAF_ENTRY OEMInitCoProcRegisterSavedArea
            eor         r1, r1, r1
            add         r2, r0, #CRUNCH_SAVESIZE

InitSaveAreaLoop
            str         r1, [r0], #4                    
            cmp         r0, r2
            blo         InitSaveAreaLoop

            ;
            ; Clear the Status register.
            ; 
            cfmv64lr    c0, r1
            cfmvsc32    c0, c0

            RETURN

;**********************************************************************
;
; void OEMSaveCoProcRegister(LPBYTE pArea);
;
;  This function is called by the kernel when a thread switch occurs 
;  to save the platform specific debug registers. The same area will 
;  be passed to OEMRestoreCoProcRegister when the thread is scheduled 
;  again.
;
;  r0 - Pointer to a memory buffer used to store the co-processor 
;       registers. 
;
;**********************************************************************
            LEAF_ENTRY OEMSaveCoProcRegister

            mrs     r2, cpsr                        ; (r0) = current status
            orr     r1, r2, #0xC0                   ; set interrupt disable bit
            msr     cpsr, r1                        ; update status register

            ;
            ; Save the DPCS and crunch registers.
            ;
            cfstr64    c15, [r0, #0x78]
            cfmv32sc   c15, c0
            cfstr64    c15, [r0, #0xb0]
            cfstr64    c0,  [r0, #0x00]
            cfstr64    c1,  [r0, #0x08]
            cfstr64    c2,  [r0, #0x10]
            cfstr64    c3,  [r0, #0x18]
            cfstr64    c4,  [r0, #0x20]
            cfstr64    c5,  [r0, #0x28]
            cfstr64    c6,  [r0, #0x30]
            cfstr64    c7,  [r0, #0x38]
            cfstr64    c8,  [r0, #0x40]
            cfstr64    c9,  [r0, #0x48]
            cfstr64    c10, [r0, #0x50]
            cfstr64    c11, [r0, #0x58]
            cfstr64    c12, [r0, #0x60]
            cfstr64    c13, [r0, #0x68]
            cfstr64    c14, [r0, #0x70]

            ;
            ; Save the accumulator registers.
            ;
            cfmv32al   c0,  a0
            cfstr32    c0,  [r0, #0x80]
            cfmv32am   c1,  a0
            cfstr32    c1,  [r0, #0x84]
            cfmv32ah   c2,  a0
            cfstr32    c2,  [r0, #0x88]
            cfmv32al   c3,  a1
            cfstr32    c3,  [r0, #0x8c]
            cfmv32am   c4,  a1
            cfstr32    c4,  [r0, #0x90]
            cfmv32ah   c5,  a1
            cfstr32    c5,  [r0, #0x94]
            cfmv32al   c6,  a2
            cfstr32    c6,  [r0, #0x98]
            cfmv32am   c7,  a2
            cfstr32    c7,  [r0, #0x9c]
            cfmv32ah   c8,  a2
            cfstr32    c8,  [r0, #0xa0]
            cfmv32al   c9,  a3
            cfstr32    c9,  [r0, #0xa4]
            cfmv32am   c10, a3
            cfstr32    c10, [r0, #0xa8]
            cfmv32ah   c11, a3
            cfstr32    c11, [r0, #0xac]

            msr     cpsr, r2                        ; update status register

            RETURN



;**********************************************************************
;
;  void OEMRestoreCoProcRegister( LPBYTE pArea );
;
;  This function is called by the kernel when a thread switch occurs 
;  to restore the platform specific debug registers 
;
;  r0 - Pointer to a memory buffer that contains the information to 
;       restore to the co-processor registers which should have be set 
;       by the OEMInitCoProcRegisterSavedArea or OEMSaveCoProcRegister. 
;
;**********************************************************************
            LEAF_ENTRY OEMRestoreCoProcRegister

            mrs     r2, cpsr                        ; (r0) = current status
            orr     r1, r2, #0xC0                   ; set interrupt disable bit
            msr     cpsr, r1                        ; update status register

            ;
            ; Restore the accumulator registers.
            ;
            cfldr32     c0,  [r0, #0x80]
            cfmval32    a0, c0
            cfldr32     c1,  [r0, #0x84]
            cfmvam32    a0, c1
            cfldr32     c2,  [r0, #0x88]
            cfmvah32    a0, c2
            cfldr32     c3,  [r0, #0x8c]
            cfmval32    a1, c3
            cfldr32     c4,  [r0, #0x90]
            cfmvam32    a1, c4
            cfldr32     c5,  [r0, #0x94]
            cfmvah32    a1, c5
            cfldr32     c6,  [r0, #0x98]
            cfmval32    a2, c6
            cfldr32     c7,  [r0, #0x9c]
            cfmvam32    a2, c7
            cfldr32     c8,  [r0, #0xa0]
            cfmvah32    a2, c8
            cfldr32     c9,  [r0, #0xa4]
            cfmval32    a3, c9
            cfldr32     c10, [r0, #0xa8]
            cfmvam32    a3, c10
            cfldr32     c11, [r0, #0xac]
            cfmvah32    a3, c11

            ;
            ; Restore the Crunch registers and dpsc.
            ;
            cfldr64    c0,  [r0, #0x00]
            cfldr64    c1,  [r0, #0x08]
            cfldr64    c2,  [r0, #0x10]
            cfldr64    c3,  [r0, #0x18]
            cfldr64    c4,  [r0, #0x20]
            cfldr64    c5,  [r0, #0x28]
            cfldr64    c6,  [r0, #0x30]
            cfldr64    c7,  [r0, #0x38]
            cfldr64    c8,  [r0, #0x40]
            cfldr64    c9,  [r0, #0x48]
            cfldr64    c10, [r0, #0x50]
            cfldr64    c11, [r0, #0x58]
            cfldr64    c12, [r0, #0x60]
            cfldr64    c13, [r0, #0x68]
            cfldr64    c14, [r0, #0x70]
            cfldr64    c15, [r0, #0xb0]
            cfmvsc32   c15, c0
            cfldr64    c15, [r0, #0x78]

            msr        cpsr, r2                 ; update status register


            RETURN
            END