kernel.inc

UCOS－II在ATMEL公司AVR CPU上的应用

/*
  kernel.inc

 		  Kernel Configuration for the 
	  
		Ultimate Realtime Operating System I
	
			  Version 2
		  

 	 Adjust this file to your hardware configuration.
	  Take special care of the MIN_STACKLEN macro.

  		(c) 1999-2000 Uros Platise
  
  		First Release: 15. Januar 1999
  		Last update: March, 2000
*/

#ifndef __KERNEL
#define __KERNEL

#include "uroslib.inc"


/*----------------------------------------------------------------------*/
/* Hardware Operating Frequency						*/
/* Used by many peripheral interfaces ... 				*/
/*----------------------------------------------------------------------*/

#define SYS_CLK		8000000			/* 8.0000 MHz */


/*----------------------------------------------------------------------*/
/* Kernel Modes: 							*/
/*----------------------------------------------------------------------*/

#define INCLUDE_VECTORS
/*#define EXTERNAL_SRAM_ENABLE*/
/*#define UROS_EVENTMODE*/
/*#define UROS_DEBUGSUPPORT*/


/*----------------------------------------------------------------------*/
/* Microcontroller Memory and Level Interrupt Configuration		*/
/*----------------------------------------------------------------------*/

#ifdef EXTERNAL_SRAM_ENABLE
  #define CFG_MCUCR	(BV(SRE)+BV(SE))
  						/* Sleep Mode Enable, No wait states */
#else
  #define CFG_MCUCR	(BV(SE))
#endif


/*----------------------------------------------------------------------*/	
/* Declares max number of task. Each task reserves 6 bytes of memory.	*/
/* Signals are supported up to 32 tasks. Adding a few code, up to	*/
/* 128 tasks could be handled. 						*/
/*----------------------------------------------------------------------*/

#define	MAX_TASKS	2
	

/*----------------------------------------------------------------------*/
/* Minimum Stack Len is a sum of total count of registers to be placed 	*/
/* on stack (see four macros below) and max count of register to placed	*/ 
/* by any interrupt routine. 						*/
/*									*/
/* The following macros defines minimum stack requirements.		*/
/* This values MUST BE SPECIFIED BY YOU AND YOUR SYSTEM REQUIREMENTS!!!	*/
/*----------------------------------------------------------------------*/

/* First Level Interrupt Maximum Stack Size - Fast Response Interrupts 
*/
#ifndef UROS_INT1L_STACKSIZE
# define UROS_INT1L_STACKSIZE	0
#endif

/* Second Level Interrupt Maximum Stack Size - Slow Response Interrupts 
*/
#ifndef UROS_INT2L_STACKSIZE
# define UROS_INT2L_STACKSIZE	0
#endif


/* Minimum Interrupt Stack Length - don't forget for kernel modules ... */
#define MIN_INTSTACKLEN	\
	UROS_INT1L_STACKSIZE + UROS_INT2L_STACKSIZE

/* number of registers to be stored: r0..r31 
   In order you change below number, four later macros (Register Storage) 
   MUST BE also updated! */

#define NO_REGISTERS	32	


/* Minimum Stack Length Required by System Calls */
#define MIN_SCSTACKLEN 4	/* SYS_SendSignal needs 6 bytes */


/*----------------------------------------------------------------------*/
/*   SPECIAL CARE SHOULD BE TAKEN WITH THE FOLLOWING MACRO:		*/
/*									*/
/*   stack_len = Breakpoint (2) + PC (2) + SREG (1) + NO_REGISTERS + 	*/
/*                + MIN_INTSTACKLEL + MIN_SCSTACKLEN 			*/
/*									*/
/* This macro defines the minimum stack size for the user tasks. 	*/
/* If your application uses calls to subroutines, or it stores/restores	*/
/* registers from the stack, you MUST take that extra space in account	*/
/* at stack memory reservation.						*/
/*----------------------------------------------------------------------*/

#define MIN_STACKLEN	\
	5 + NO_REGISTERS + SYSCALLS_STACKSIZE + MIN_INTSTACKLEN


/*----------------------------------------------------------------------*/
/* Register Storage 							*/
/*----------------------------------------------------------------------*/

/* Registers to be poped in right order. */
#define POP_registers \
      pop r0	pop r1	pop r2	pop r3  \
      pop r4	pop r5	pop r6	pop r7  \
      pop r8	pop r9	pop r10	pop r11 \
      pop r12	pop r13	pop r14	pop r15 \
      pop r16	pop r17	pop r18	pop r19 \
      pop r20	pop r21	pop r22	pop r23 \
      pop r24	pop r25	pop r26	pop r27 \
      pop r28	pop r29	pop r30	pop r31

/* The first register is used for additional processing and is need
   in advance. It should be the last one from the POP_registers macro.
*/
#define PReg0	r31

/* Other registers to be pushed in reverse order. */
#define PUSH_registers \
       /*r31*/ push r30 push r29 push r28 \
      push r27 push r26 push r25 push r24 \
      push r23 push r22 push r21 push r20 \
      push r19 push r18 push r17 push r16 \
      push r15 push r14 push r13 push r12 \
      push r11 push r10 push r9  push r8  \
      push r7  push r6  push r5  push r4  \
      push r3  push r2  push r1  push r0


/*----------------------------------------------------------------------*/
/* Scheduller Configuration - Timer 0 					*/
/*----------------------------------------------------------------------*/

#ifndef UROS_EVENTMODE
  #define CFG_TIMSK		(1<<TOIE0)
#else
  #define CFG_TIMSK		0
#endif


#define CFG_TPRESCALER		((1<<CS02)+(1<<CS00))
#define CFG_TDBGPRESCALER	(1<<CS00)


/*----------------------------------------------------------------------*/
/* Task Settings - byte/bits description 				*/
/*----------------------------------------------------------------------*/

#define TS_TSB		0	/* task status byte */
#define TS_FG		1	/* task foreground time */
#define TS_SPL		2	/* lower 8 bits of the task stack pointer */
#define TS_SPH		3	/* higher 8 bits of the task stack pointer */
#define TS_SFM0		4	/* task signal flag mask 0 */
#define TS_SFM1		5	/* task signal flag mask 1 */

/* Task Status Byte */
#define TSB_IDLE	0x80
#define TSB_DEBUG	0x40
#define TSB_WAITSIG	0x01

#define TSB_IDLE_B	7
#define TSB_DEBUG_B	6
#define TSB_WAITSIG_B	0


/*----------------------------------------------------------------------*/
/* Debug Mode under EVENT MODE for Step-by-Step execution 		*/
/* ISC00 and ISC01 in MCUCR must be set low in order to provide		*/
/* level triggering							*/
/*----------------------------------------------------------------------*/

/* Refer to GIMSK port */
#define INT0_ENABLE	(1<<INT0)
#define INT0_DISABLE	(0xff-INT0_ENABLE)


/*----------------------------------------------------------------------*/
/* Scheduller Interrupt	Mask/Unmask Macros				*/
/*	If multi-interrupt context switch is required the following	*/
/*	two macros _MUST_ be used in interrupt routines to prevent task */
/*	scheduller execution above the other interrupts.		*/
/*	See uart (uart.s) device driver for example.			*/
/*----------------------------------------------------------------------*/

#ifndef UROS_EVENTMODE

/* Mask Task Scheduller Interrupt from Interrupt Routine.
   The temporary register is loaded a current value of the timer8 counter
   prescaller and pushed on the stack before clearing it.
   
   The ldi instruction below is used instead of clr because it does
   not modify flags in the SREG register.
*/
#define __MASK_SCHED(TmpReg)	\
	in	TmpReg, TCCR0	\
	push	TmpReg	\
	ldi	TmpReg, 0	\
	out	TCCR0, TmpReg


/* Mask Task Scheduller Interrupt from User Task.
   When doing this inside the task, context switch to another task
   is to be disabled. Thus, saving the current value of the timer is
   not necessary.
*/	
#define __MASK_APP_SCHED(TmpReg) \
	clr	TmpReg	\
	out	TCCR0, TmpReg
	
	
/* Unmask Task Scheduller Interrupt from Interrupt.
   The timer8 counter prescaler is restored from the stack.
*/
#define __UNMASK_SCHED(TmpReg)\
	pop	TmpReg	\
	out	TCCR0, TmpReg	
	
	
/* Unmask Task Scheduller Interrupt from User Task.
   The timer8 counter prescaler is restored original value.
*/
#define __UNMASK_APP_SCHED(TmpReg)\
	ldi	TmpReg, CFG_TPRESCALER \
	out	TCCR0, TmpReg	
	
#else

/* Task scheduller masking/unmaksing has no effect in event mode.
   It could only disturb the operation of the 8 bit timer for the
   other purposes.
*/
#define __MASK_SCHED(register)	   ds.b 0
#define __MASK_APP_SCHED(register) ds.b 0
#define __UNMASK_SCHED(register)   ds.b 0
#endif


/*----------------------------------------------------------------------*/
/* Kernel Label Registering (Low Endian - Without Endian Bug) 		*/
/*----------------------------------------------------------------------*/

#define DC_LABEL(x)	dc.w x>>1
#define DC_STACK(x)	dc.w x


#define ASM_INIT(init_func)	\
	extern init_func	\
	DC_LABEL(init_func)	
	
#define ASM_TASK(fg_time, task_pc, task_stack)	\
        dc.b 0xff, fg_time              \
        DC_STACK(task_stack)		\
extern task_pc				\	
        DC_LABEL(task_pc)		\


/*----------------------------------------------------------------------*/
/* Initialization Registry						*/
/*----------------------------------------------------------------------*/

#ifdef __KERNEL_SOURCE__

#define INIT_PROCEDURES				\
	extern init_A	rcall init_A		\
	

/*----------------------------------------------------------------------*/
/* Stack Space Reservations						*/
/*----------------------------------------------------------------------*/

	seg eram.kernel.stack
	ds.b	MIN_STACKLEN
stack_A:	
	ds.b	MIN_STACKLEN
stack_B:

	
/*----------------------------------------------------------------------*/
/* Register Task and Declare Stack Space				*/
/*									*/
/* Notes on parameters:							*/
/*    fg_time             Sets task nice level (max=0, min=255)		*/
/*    task_stack          Gives stack the name				*/
/*    stack_len           size of the task stack			*/
/*    task_pc             Startup program counter			*/
/*----------------------------------------------------------------------*/

	seg flash.kernel.task
task_list:

	/* User Tasks - Lowest Priority First */
	ASM_TASK(255, task_A, stack_A)
	ASM_TASK(255, task_B, stack_B)
	
	/* Terminator */
	DC_LABEL(0)


/*----------------------------------------------------------------------*/
/* The following segment is defined due to the error checking only.	*/
/*----------------------------------------------------------------------*/

	seg flash.Invalid

#endif /* __KERNEL_SOURCE__ */

#endif