hdpdeps.ref

DES加密VHDL源代码,包括速度优先与面积优先两种设计

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FL f:/wlz/mydesign/des/dessmall/desarea/../s7.vhd 2005/07/25.16:17:44
EN work/S7              FL f:/wlz/mydesign/des/dessmall/desarea/../s7.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S7/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s7.vhd \
      EN work/S7
FL f:/wlz/mydesign/des/dessmall/desarea/../fullround.vhd 2005/07/26.14:15:38
EN work/FULLROUND       FL f:/wlz/mydesign/des/dessmall/desarea/../fullround.vhd \
      PB ieee/STD_LOGIC_1164
AR work/FULLROUND/BEHAVIOR \
      FL f:/wlz/mydesign/des/dessmall/desarea/../fullround.vhd EN work/FULLROUND \
      CP IP             CP MUX32          CP ROUNDFUNC      CP OV32           CP FP
FL f:/wlz/mydesign/des/dessmall/desarea/../pp.vhd 1997/01/01.02:52:52
EN work/PP              FL f:/wlz/mydesign/des/dessmall/desarea/../pp.vhd \
      PB ieee/STD_LOGIC_1164
AR work/PP/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../pp.vhd \
      EN work/PP
FL f:/wlz/mydesign/des/dessmall/desarea/../s3.vhd 2005/07/25.15:28:56
EN work/S3              FL f:/wlz/mydesign/des/dessmall/desarea/../s3.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S3/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s3.vhd \
      EN work/S3
FL f:/wlz/mydesign/des/dessmall/desarea/../converter.vhd 2005/07/26.11:55:20
EN work/CONVERTER       FL f:/wlz/mydesign/des/dessmall/desarea/../converter.vhd \
      PB ieee/STD_LOGIC_1164
AR work/CONVERTER/BEHAVIOR \
      FL f:/wlz/mydesign/des/dessmall/desarea/../converter.vhd EN work/CONVERTER
FL f:/wlz/mydesign/des/dessmall/desarea/../fp.vhd 1997/01/01.02:30:02
EN work/FP              FL f:/wlz/mydesign/des/dessmall/desarea/../fp.vhd \
      PB ieee/STD_LOGIC_1164
AR work/FP/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../fp.vhd \
      EN work/FP
FL f:/wlz/mydesign/des/dessmall/desarea/../state.vhd 2005/07/26.11:52:24
EN work/STATE           FL f:/wlz/mydesign/des/dessmall/desarea/../state.vhd \
      PB ieee/STD_LOGIC_1164
AR work/STATE/STRUCTURAL FL f:/wlz/mydesign/des/dessmall/desarea/../state.vhd \
      EN work/STATE     CP CONTROL        CP CONVERTER      CP FULLROUND \
      CP KEYSCHED
FL f:/wlz/mydesign/des/dessmall/desarea/../shifter.vhd 2005/07/26.14:07:40
EN work/SHIFTER         FL f:/wlz/mydesign/des/dessmall/desarea/../shifter.vhd \
      PB ieee/STD_LOGIC_1164
AR work/SHIFTER/BEHAVIOUR FL f:/wlz/mydesign/des/dessmall/desarea/../shifter.vhd \
      EN work/SHIFTER
FL f:/wlz/mydesign/des/dessmall/desarea/../roundfunc.vhd 1997/01/01.02:42:44
EN work/ROUNDFUNC       FL f:/wlz/mydesign/des/dessmall/desarea/../roundfunc.vhd \
      PB ieee/STD_LOGIC_1164
AR work/ROUNDFUNC/BEHAVIOUR \
      FL f:/wlz/mydesign/des/dessmall/desarea/../roundfunc.vhd EN work/ROUNDFUNC \
      CP XP             CP DESXOR1        CP S1             CP S2             CP S3 \
      CP S4             CP S5             CP S6             CP S7             CP S8 \
      CP PP             CP DESXOR2        CP REG32
FL f:/wlz/mydesign/des/dessmall/desarea/../s8.vhd 2005/07/25.16:50:16
EN work/S8              FL f:/wlz/mydesign/des/dessmall/desarea/../s8.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S8/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s8.vhd \
      EN work/S8
FL f:/wlz/mydesign/des/dessmall/desarea/../s4.vhd 2005/07/25.15:51:24
EN work/S4              FL f:/wlz/mydesign/des/dessmall/desarea/../s4.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S4/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s4.vhd \
      EN work/S4
FL f:/wlz/mydesign/des/dessmall/desarea/../reg32.vhd 1997/01/01.02:53:42
EN work/REG32           FL f:/wlz/mydesign/des/dessmall/desarea/../reg32.vhd \
      PB ieee/STD_LOGIC_1164
AR work/REG32/SYNTH     FL f:/wlz/mydesign/des/dessmall/desarea/../reg32.vhd \
      EN work/REG32
FL f:/wlz/mydesign/des/dessmall/desarea/../ov32.vhd 2005/07/26.14:09:44
EN work/OV32            FL f:/wlz/mydesign/des/dessmall/desarea/../ov32.vhd \
      PB ieee/STD_LOGIC_1164
AR work/OV32/SYNTH      FL f:/wlz/mydesign/des/dessmall/desarea/../ov32.vhd \
      EN work/OV32
FL f:/wlz/mydesign/des/dessmall/desarea/../desxor1.vhd 1997/01/01.02:47:14
EN work/DESXOR1         FL f:/wlz/mydesign/des/dessmall/desarea/../desxor1.vhd \
      PB ieee/STD_LOGIC_1164
AR work/DESXOR1/BEHAVIOR FL f:/wlz/mydesign/des/dessmall/desarea/../desxor1.vhd \
      EN work/DESXOR1
FL f:/wlz/mydesign/des/dessmall/desarea/../s5.vhd 2005/07/25.16:04:36
EN work/S5              FL f:/wlz/mydesign/des/dessmall/desarea/../s5.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S5/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s5.vhd \
      EN work/S5
FL f:/wlz/mydesign/des/dessmall/desarea/../xp.vhd 1997/01/01.02:46:20
EN work/XP              FL f:/wlz/mydesign/des/dessmall/desarea/../xp.vhd \
      PB ieee/STD_LOGIC_1164
AR work/XP/BEHAVIOR     FL f:/wlz/mydesign/des/dessmall/desarea/../xp.vhd \
      EN work/XP
FL f:/wlz/mydesign/des/dessmall/desarea/../mux32.vhd 2005/07/26.12:00:06
EN work/MUX32           FL f:/wlz/mydesign/des/dessmall/desarea/../mux32.vhd \
      PB ieee/STD_LOGIC_1164
AR work/MUX32/SYNTH     FL f:/wlz/mydesign/des/dessmall/desarea/../mux32.vhd \
      EN work/MUX32
FL f:/wlz/mydesign/des/dessmall/desarea/../pc1.vhd 1997/01/01.02:48:50
EN work/PC1             FL f:/wlz/mydesign/des/dessmall/desarea/../pc1.vhd \
      PB ieee/STD_LOGIC_1164
AR work/PC1/BEHAVIOR    FL f:/wlz/mydesign/des/dessmall/desarea/../pc1.vhd \
      EN work/PC1
FL f:/wlz/mydesign/des/dessmall/desarea/../s1.vhd 2005/07/25.15:02:34
EN work/S1              FL f:/wlz/mydesign/des/dessmall/desarea/../s1.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S1/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s1.vhd \
      EN work/S1
FL f:/wlz/mydesign/des/dessmall/desarea/../ip.vhd 1997/01/01.02:28:16
EN work/IP              FL f:/wlz/mydesign/des/dessmall/desarea/../ip.vhd \
      PB ieee/STD_LOGIC_1164
AR work/IP/BEHAVIOR     FL f:/wlz/mydesign/des/dessmall/desarea/../ip.vhd \
      EN work/IP
FL f:/wlz/mydesign/des/dessmall/desarea/../desxor2.vhd 1997/01/01.02:47:48
EN work/DESXOR2         FL f:/wlz/mydesign/des/dessmall/desarea/../desxor2.vhd \
      PB ieee/STD_LOGIC_1164
AR work/DESXOR2/BEHAVIOUR FL f:/wlz/mydesign/des/dessmall/desarea/../desxor2.vhd \
      EN work/DESXOR2
FL f:/wlz/mydesign/des/dessmall/desarea/../keysched.vhd 2005/07/26.14:10:54
EN work/KEYSCHED        FL f:/wlz/mydesign/des/dessmall/desarea/../keysched.vhd \
      PB ieee/STD_LOGIC_1164
AR work/KEYSCHED/BEHAVIOUR \
      FL f:/wlz/mydesign/des/dessmall/desarea/../keysched.vhd EN work/KEYSCHED \
      CP PC1            CP SHIFTER        CP PC2
FL f:/wlz/mydesign/des/dessmall/desarea/../s6.vhd 2005/07/25.16:10:44
EN work/S6              FL f:/wlz/mydesign/des/dessmall/desarea/../s6.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S6/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s6.vhd \
      EN work/S6
FL f:/wlz/mydesign/des/dessmall/desarea/../pc2.vhd 1997/01/01.02:52:12
EN work/PC2             FL f:/wlz/mydesign/des/dessmall/desarea/../pc2.vhd \
      PB ieee/STD_LOGIC_1164
AR work/PC2/BEHAVIOR    FL f:/wlz/mydesign/des/dessmall/desarea/../pc2.vhd \
      EN work/PC2
FL f:/wlz/mydesign/des/dessmall/desarea/../s2.vhd 2005/07/25.15:17:56
EN work/S2              FL f:/wlz/mydesign/des/dessmall/desarea/../s2.vhd \
      PB ieee/STD_LOGIC_1164
AR work/S2/BEHAVIOUR    FL f:/wlz/mydesign/des/dessmall/desarea/../s2.vhd \
      EN work/S2
FL f:/wlz/mydesign/des/dessmall/desarea/../control.vhd 2005/07/26.11:54:42
EN work/CONTROL         FL f:/wlz/mydesign/des/dessmall/desarea/../control.vhd \
      PB ieee/STD_LOGIC_1164
AR work/CONTROL/BEHAVIOR FL f:/wlz/mydesign/des/dessmall/desarea/../control.vhd \
      EN work/CONTROL