ledwater.map.summary

来自「FPGA下的DDS程序的编写,VHDL语言,」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Tue Aug 28 20:40:12 2007
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : ledwater
Top-level Entity Name : ledwater
Family : Cyclone
Total logic elements : N/A until Partition Merge
Total pins : N/A until Partition Merge
Total virtual pins : N/A until Partition Merge
Total memory bits : N/A until Partition Merge
Total PLLs : N/A until Partition Merge