stp1.stp

FPGA下的DDS程序的编写,VHDL语言,

<session jtag_chain="ByteBlasterMV [LPT1]" jtag_device="" sof_file="" top_level_entity="ledwater">
  <display_tree gui_logging_enabled="0">
  </display_tree>
  <mnemonics/>
  <static_plugin_mnemonics/>
  <global_info>
    <single attribute="active instance" value="0"/>
    <single attribute="lock mode" value="36110"/>
    <single attribute="sof manager hidden" value="1"/>
    <multi attribute="window position" size="9" value="776,453,398,126,356,50,34,0,1"/>
  </global_info>
</session>