📄 san_psk.mdl
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BlockType Trigonometry
Operator "sin"
OutputSignalType "auto"
SampleTime "-1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Monospaced"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Monospaced"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "san_PSK"
Location [13, 75, 1025, 600]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "AWGN\nChannel"
Ports [1, 1]
Position [355, 109, 430, 161]
SourceBlock "commchan3/AWGN\nChannel"
SourceType "AWGN Channel"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
seed "67"
noiseMode "Signal to noise ratio (SNR)"
EbNodB "10"
EsNodB "10"
SNRdB "10"
bitsPerSym "1"
Ps "1"
Tsym "1"
variance "1"
}
Block {
BlockType Reference
Name "Bernoulli Binary\nGenerator"
Ports [0, 1]
Position [15, 63, 95, 107]
BackgroundColor "green"
DropShadow on
DialogController "commDDGCreate"
DialogControllerArgs "DataTag0"
FontName "Arial"
SourceBlock "commrandsrc2/Bernoulli Binary\nGenerator"
SourceType "Bernoulli Binary Generator"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
P "0.5"
seed "61"
Ts "1/200"
frameBased off
sampPerFrame "1"
orient off
outDataType "double"
}
Block {
BlockType Reference
Name "Compare\nTo Zero"
Ports [1, 1]
Position [915, 45, 945, 75]
SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo "
"Zero"
SourceType "Compare To Zero"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
relop ">"
LogicOutDataTypeMode "uint8"
ZeroCross off
}
Block {
BlockType Reference
Name "Digital\nFilter Design"
Ports [1, 1]
Position [580, 37, 650, 83]
BackgroundColor "cyan"
DropShadow on
UserDataPersistent on
UserData "DataTag1"
SourceBlock "dsparch4/Digital\nFilter Design"
SourceType "Digital Filter Design"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
mwdsp_browser_bugfix_var off
}
Block {
BlockType Reference
Name "Digital\nFilter Design1"
Ports [1, 1]
Position [585, 317, 655, 363]
BackgroundColor "cyan"
DropShadow on
UserDataPersistent on
UserData "DataTag2"
SourceBlock "dsparch4/Digital\nFilter Design"
SourceType "Digital Filter Design"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
mwdsp_browser_bugfix_var off
}
Block {
BlockType Reference
Name "Digital\nFilter Design2"
Ports [1, 1]
Position [705, 177, 775, 223]
Orientation "left"
BackgroundColor "cyan"
DropShadow on
NamePlacement "alternate"
UserDataPersistent on
UserData "DataTag3"
SourceBlock "dsparch4/Digital\nFilter Design"
SourceType "Digital Filter Design"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
mwdsp_browser_bugfix_var off
}
Block {
BlockType Reference
Name "Discrete-Time\nVCO"
Ports [1, 1]
Position [565, 142, 655, 188]
Orientation "left"
BackgroundColor "cyan"
DropShadow on
NamePlacement "alternate"
FontName "Arial"
SourceBlock "commsynccomp2/Discrete-Time\nVCO"
SourceType "Discrete-Time VCO"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
Ac ".5"
Fc "2e3"
Kc "100"
Ph "0"
ts "1/48e3"
}
Block {
BlockType Reference
Name "Discrete-Time\nVCO1"
Ports [1, 1]
Position [565, 217, 655, 263]
Orientation "left"
BackgroundColor "cyan"
DropShadow on
NamePlacement "alternate"
FontName "Arial"
SourceBlock "commsynccomp2/Discrete-Time\nVCO"
SourceType "Discrete-Time VCO"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
Ac ".5"
Fc "2e3"
Kc "100"
Ph "pi/2"
ts "1/48e3"
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [305, 117, 335, 148]
BackgroundColor "green"
DropShadow on
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [505, 92, 535, 123]
BackgroundColor "cyan"
DropShadow on
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
Ports [2, 1]
Position [510, 307, 540, 338]
BackgroundColor "cyan"
DropShadow on
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [825, 182, 855, 213]
Orientation "left"
BackgroundColor "cyan"
DropShadow on
NamePlacement "alternate"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType RateTransition
Name "Rate Transition"
Position [235, 64, 275, 106]
BackgroundColor "green"
DropShadow on
}
Block {
BlockType Scope
Name "Scope"
Ports [3]
Position [970, 13, 1005, 107]
Floating off
Location [305, 319, 1019, 712]
Open off
NumInputPorts "3"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "Original Bit Sequence"
axes2 "Recovered Bit Sequence"
axes3 "Received Bit Sequence"
}
TimeRange "0.5"
YMin "-1~0~-0.2"
YMax "1~1~0.15"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope1"
Ports [3]
Position [280, 208, 310, 242]
Orientation "left"
NamePlacement "alternate"
Floating off
Location [262, 218, 1051, 692]
Open off
NumInputPorts "3"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
axes3 "%<SignalLabel>"
}
TimeRange "0.06553599999999937"
YMin "-0.5~-0.5~-0.5"
YMax "0.5~0.5~0.5"
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