iir32.lst

TMS320F2812的滤波库及其测试程序

TMS320C2000 COFF Assembler PC Version 3.06 Tue Apr 06 19:12:16 2004

Tools Copyright (c) 1996-2002 Texas Instruments Incorporated
iir32.asm                                                            PAGE    1

       1              ;========================================================================
       2              ;
       3              ; File Name     : iir32.asm
       4              ; 
       5              ; Originator    : Advanced Embeeded Control (AEC)
       6              ;                 Texas Instruments Inc. 
       7              ; 
       8              ; Description   : This file contain source code for 32 bit IIR implementation
       9              ;               
      10              ; Date          : 25/12/2001
      11              ;======================================================================
      12              ; 
      13              ; 
      14              ; Routine Name  : Generic Function      
      15              ; Routine Type  : C Callable
      16              ; 
      17              ; Description   :
      18              ; void IIR5BIQ32_calc(IIR5BIQ32_handle) 
      19              ;
      20              ; This routine implements the IIR filter using cacade biquad structure
      21              ;======================================================================
      22              ;typedef struct {  
      23              ;   void (*init)(void *);   /* Ptr to Init funtion           */
      24              ;   void (*calc)(void *);   /* Ptr to calc fn                */ 
      25              ;   long *coeff_ptr;        /* Pointer to Filter coefficient */
      26              ;   long *dbuffer_ptr;      /* Delay buffer ptr              */
      27              ;   int nbiq;               /* No of biquad                  */
      28              ;   int input;              /* Latest Input sample           */
      29              ;   long isf;               /* Input Scale Factor            */ 
      30              ;   long output32;          /* Filter Output                 */
      31              ;   int output16            /* Filter Output                 */
      32              ;   int qfmat;              /* Coefficients Q Format         */
      33              ;        }IIR5BIQ32;     
      34              ;=====================================================================
      35              
      36              ; Module definition for external referance
      37                              .def    _IIR5BIQ32_calc
      38                              .def    _IIR5BIQ32_init 
      39              
      40 00000000       _IIR5BIQ32_init:
      41 00000000 DC06              ADDB    XAR4,#6         ; XAR4->dbuffer_ptr
      42 00000001 C4C4              MOVL    XAR6,*+XAR4[0]  ; XAR6=dbuffer_ptr
      43 00000002 5603              MOV     ACC,*+XAR4[2]<<2; ACC=4*nbiq
         00000003 02D4 
      44 00000004 1901              SUB     ACC,#1          ; ACC=(4*nbiq)-1
      45 00000005 58A9              MOVZ    AR0,AL          ; AR0=(4*nbiq)-1
      46 00000006 07C4              ADDL    ACC,*XAR4       ; ACC=dbuffer_ptr + (4*nbiq) - 1
      47 00000007 1E84              MOVL    *XAR4++,ACC     ; XAR4->nbiq, 
      48                                                  ; dbuffer_ptr=dbuffer_ptr + (4*nbiq) - 1
      49              
      50 00000008 2BCC              MOV     *+XAR4[1],#0    ; input=0
      51 00000009 0220              MOVB    ACC,#32
      52 0000000a AEFC              SUB     ACC,*+XAR4[7]
      53 0000000b 96FC              MOV     *+XAR4[7],AL    ; qfmat=32-qfmat
      54 0000000c 2BF4              MOV     *+XAR4[6],#0    ; output16=0
TMS320C2000 COFF Assembler PC Version 3.06 Tue Apr 06 19:12:16 2004

Tools Copyright (c) 1996-2002 Texas Instruments Incorporated
iir32.asm                                                            PAGE    2

      55 0000000d 2BEC              MOV     *+XAR4[5],#0    ; output32=0
      56 0000000e 2BE4              MOV     *+XAR4[4],#0    ; output32=0
      57              
      58 0000000f F7A0              RPT     AR0
      59 00000010 2B86              || MOV  *XAR6++,#0
      60                          
      61 00000011 0006              LRETR
      62                                      
      63                        
      64 00000012       _IIR5BIQ32_calc:    
      65 00000012 3B03              SETC    SXM,OVM          
      66 00000013 5633              ZAPA                    ; Zero the ACC, P registers and OVC counter
      67              
      68 00000014 DC04              ADDB    XAR4,#4         ; AR4->coeff_ptr
      69 00000015 C584              MOVL    XAR7,*XAR4++    ; XAR4->dbuffer_ptr, XAR7=coeff_ptr->a21
      70 00000016 C484              MOVL    XAR6,*XAR4++    ; XAR4->order, XAR6=dbuffer_ptr->d1(n-2)  
      71 00000017 5884              MOVZ    AR0,*XAR4++     ; XAR4->input, AR0=nbiq
      72              
      73 00000018 2D84              MOV     T,*XAR4++       ; XAR4->isf, T=input
      74 00000019 5656              MOV     TL,#0
      75              
      76 0000001a 5663              QMPYL   ACC,XT,*XAR4++  ; XAR4->output32, ACC=input*isf
         0000001b 0084 
      77 0000001c DE02              ADDB    XAR6,#2 
      78 0000001d D881              SUBB    XAR0,#1         ; AR0=nbiq-1
      79                      
      80              ; kth Biquad Computation   where k=1:nbiq
      81 0000001e       biqd:     
      82 0000001e 878E              MOVL    XT,*--XAR6      ; T=dk(n-2)
      83 0000001f 5667              QMPYL   P,XT,*XAR7++    ; P= dk(n-2)*a2k
         00000020 0087 
      84 00000021 878E              MOVL    XT,*--XAR6      ; T=dk(n-1)
      85 00000022 5646              QMPYAL  P,XT,*XAR7++    ; ACC=input*isf + dk(n-2)*a2k, P=dk(n-1)*a1k
         00000023 0087 
      86                          
      87 00000024 87D6              MOVL    XT,*+XAR6[2]    ; T=dk(n-2)
      88 00000025 5646              QMPYAL  P,XT,*XAR7++    ; ACC=input*isf + dk(n-2)*a2k + dk(n-1)*a1k
         00000026 0087 
      89                                                  ; P=dk(n-2)*b2k
      90                          
      91 00000027 2DDC              MOV     T,*+XAR4[3]     ; T=qfmat
      92 00000028 563B              LSLL    ACC,T           ; ACC=input*isf + dk(n-2)*a2k + dk(n-1)*a1k (Q31)
      93                                              
      94 00000029 A6C6              MOVDL   XT,*XAR6        ; XT=dk(n-1), dk(n-2)=dk(n-1)
      95 0000002a 1EC6              MOVL    *XAR6,ACC       ; dk(n-1)=dk(n)
      96 0000002b 5663              QMPYL   ACC,XT,*XAR7++  ; ACC=dk(n-1)*b1k
         0000002c 0087 
      97                          
      98 0000002d 87C6              MOVL    XT,*XAR6        ; XT=dk(n)
      99 0000002e 5646              QMPYAL  P,XT,*XAR7++    ; ACC=dk(n-1)*b1k + dk(n-2)*b2k, P=dk(n)*b0k
         0000002f 0087 
     100 00000030 07AB              ADDL    ACC,P
     101                          
     102 00000031 0008              BANZ    biqd,AR0--
         00000032 FFED 
TMS320C2000 COFF Assembler PC Version 3.06 Tue Apr 06 19:12:16 2004

Tools Copyright (c) 1996-2002 Texas Instruments Incorporated
iir32.asm                                                            PAGE    3

     103                          
     104 00000033 2DDC              MOV     T,*+XAR4[3]     ; T=qfmat, XAR4->output32
     105 00000034 563B              LSLL    ACC,T
     106 00000035 FF52              ROR     ACC
     107 00000036 1E84              MOVL    *XAR4++,ACC     ; output32=Filtered Output in Q30 format 
     108 00000037 97C4              MOV     *XAR4,AH        ; output16=Filtered Output in Q14 format    
     109 00000038 2902              CLRC    OVM
     110 00000039 0006              LRETR                  
     111              
     112              
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     119              
     120                          
     121                                         

No Assembly Errors, No Assembly Warnings