📄 c200mnrt.lst
字号:
dspa -l -s -i../../../../rtmon/ -i../include -i../../../../lib/dmclib/clib/include -i../../../../lib/drvlib/clib/include -v2xx -iC:/ti/c2400/cgtools/include -g c200mnrt.asm ../sys/aci1_1/c/obj/c200mnrt.obj
TMS320C24xx COFF Assembler Version 7.02 Wed Apr 16 12:20:49 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
c200mnrt.asm PAGE 1
1 ;*H*************************************************************************
2 ; TI Proprietary Information - Internal Data
3 ; Copyright (c) 1993-1999, Texas Instruments Incorporated
4 ; All rights reserved
5 ;***************************************************************************
6 ;
7 ; DESCRIPTION:
8 ;
9 ; Truely awesome monitor program
10 ; for C25LP HLL Real-Time Debugger.
11 ;
12 ; TI Proprietary Information - Internal Data.
13 ; Copyright (c) 1993-1997, Texas Instruments Incorporated.
14 ;
15 ; This real-time monitor was developed by H.Roland Hoar.
16 ;
17 ; STATUS:
18 ;
19 ; This monitor version is dated 24th of June 1997.
20 ; It is intended for use with HLL Debugger versions "1.19" or later.
21 ; The MON_RELEASE mnemonic has the hexadecimal value '1019'.
22 ;
23 ; This document has page feed characters spaced for 66 lines per page.
24 ; Its page alignment is adjusted to ensure
25 ; attractive two-page-per-sheet printing.
26 ;
27 ;***************************************************************************
28 ;
30 .include "c200mnrt.i" ; Include conditional assembly options.
31 .mmregs ; Include standard register mnemonics.
32 .length 66 ; Set the page length for the listing.
33 ;
TMS320C24xx COFF Assembler Version 7.02 Wed Apr 16 12:20:49 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
Monitor program for C25LP HLL Real-Time Debugger. PAGE 2
35 ;***************************************************************************
36 ;
37 ; EXTERNAL FUNCTIONS:
38 ;
39 ; MON_SE_CNFG SE device configuration routine.
40 ; MON_RT_CNFG RT device configuration routine.
41 ; MON_EINTR Interrupt vector table macro "mon_eintr_vecs".
42 ; MON_ETRAP Interrupt vector table macro "mon_etrap_vecs".
43 ;
44 ; INTERNAL FUNCTIONS:
45 ;
46 ; MON_TRAP_ENTRY Monitor emulation trap service routine.
47 ; MON_INTR_ENTRY Monitor emulation interrupt service routine.
48 ; MON_ENTRY Entry routine shared by traps and interrupts.
49 ; MON_WAIT Wait to read a debugger message.
50 ; MON_EVALUATE Evaluate the type of debugger message.
51 ; SENDCMND, RECVCMND, DOAWRITE, SWCHOPRT, MAYBERUN:
52 ; These functions, labelled "_ENTR" and "_EXIT",
53 ; respond to the type and value of the message.
54 ; They implement the core of monitor state machine.
55 ; MON_UNUSED Process a debugger unused command.
56 ; MON_ADRSWR Process a debugger write address command.
57 ; MON_PMRD Process a debugger read program memory command.
58 ; MON_PMWR Process a debugger write program memory command.
59 ; MON_DMRD Process a debugger read data memory command.
60 ; MON_DMWR Process a debugger write data memory command.
61 ; MON_IORD Process a debugger read io memory command.
62 ; MON_IOWR Process a debugger write io memory command.
63 ; MON_EXECUTE, MON_EXIT, MON_QUICKGO:
64 ; Monitor exit routines to return to the application.
65 ;
66 ;***************************************************************************
67 ;
TMS320C24xx COFF Assembler Version 7.02 Wed Apr 16 12:20:49 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
Monitor program for C25LP HLL Real-Time Debugger. PAGE 3
69 ;***************************************************************************
70 ; REALTIME MNEMONICS
71 ;***************************************************************************
72
73 ;---------------------------------------------------------------------------
74 ; Define the PRM_CMND register masks and bits.
75 ;---------------------------------------------------------------------------
76 0007 CMNDMASK .set 00007h ; Mask for command opcode field.
77 ;
78 0000 CMND_NONE .set 00000h ; Address value read command opcode.
79 0001 CMND_ADRS .set 00001h ; Address value write command opcode.
80 0002 CMND_PMRD .set 00002h ; Program memory read command opcode.
81 0003 CMND_PMWR .set 00003h ; Program memory write command opcode.
82 0004 CMND_DMRD .set 00004h ; Data memory read command opcode.
83 0005 CMND_DMWR .set 00005h ; Data memory write command opcode.
84 0006 CMND_IORD .set 00006h ; IO memory read command opcode.
85 0007 CMND_IOWR .set 00007h ; IO memory write command opcode.
86 ;
87 0001 RORWMASK .set 00001h ; Mask to distinguish read/write commands.
88 0004 PORDMASK .set 00004h ; Mask to distinguish program/data commands.
89 ;
90 0008 AINCMASK .set 00008h ; Mask for address increment option.
91 ;
92 0010 STOPMASK .set 00010h ; Mask for stop-mode flag.
93 0020 SNGLMASK .set 00020h ; Mask for single-step flag.
94 0040 EVERMASK .set 00040h ; Mask for forever-run flag.
95 ;
96 0080 MAPSMASK .set 00080h ; Mask for map register usage option.
97 ;
98 0000 B_RORWMASK .set 00h ; Bit number of the read/write command mask.
99 0002 B_PORDMASK .set 02h ; Bit number of the program/data command mask.
100 ;
101 0003 B_AINCMASK .set 03h ; Bit number of the address increment option.
102 ;
103 0004 B_STOPMASK .set 04h ; Bit number of the stop-mode flag.
104 0005 B_SNGLMASK .set 05h ; Bit number of the single-step flag.
105 0006 B_EVERMASK .set 06h ; Bit number of the forever-run flag.
106 ;
107 0007 B_MAPSMASK .set 07h ; Bit number of the map register usage option.
108 ;
TMS320C24xx COFF Assembler Version 7.02 Wed Apr 16 12:20:49 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
Monitor program for C25LP HLL Real-Time Debugger. PAGE 4
110 ;---------------------------------------------------------------------------
111 ; Define the MON_STATUS register masks and bits.
112 ;---------------------------------------------------------------------------
113 0000 ATN_OK .set 00000h ; Value for no outstanding status.
114 0001 ATN_RESET .set 00001h ; Mask for reset status.
115 000c ATN_SWBP .set 0000Ch ; Mask for software breakpoint status.
116 0080 ATN_TRAP .set 00080h ; Mask for trap error.
117 ;
118 ;---------------------------------------------------------------------------
119 ; Define the ST0 register masks used for manipulating public bits.
120 ;---------------------------------------------------------------------------
121 0200 USR_INT_DSB .set 00200h ; Mask for ST0 user interrupt mode bit.
122 ;
123 ;---------------------------------------------------------------------------
124 ; Define the ST1 register masks used for manipulating hidden bits.
125 ;---------------------------------------------------------------------------
126 0020 SNG_STP_DSB .set 00020h ; Mask for ST1 single step mode disable.
127 0080 GLB_INT_ENB .set 00080h ; Mask for ST1 global interrupt enable.
128 ;
129 ;---------------------------------------------------------------------------
130 ; Define the MON_AR value to be used (choice of AR7-0 register)
131 ;---------------------------------------------------------------------------
132 0000 MON_AR .set MON_AR_VALUE & 00007h ;
133 ;
134 ;---------------------------------------------------------------------------
135 ; Define the IFR register masks and bits.
136 ;---------------------------------------------------------------------------
137 0040 MON_EMUMSK .set 00040h ; Mask for emulation interrupt.
138 ;
139 0006 B_EMUMSK .set 06h ; Bit number of emulation interrupt.
140 ;
141 ;---------------------------------------------------------------------------
142 ; Define the IMR register masks and bits.
143 ;---------------------------------------------------------------------------
144 .eval 0, MON_USER_INT
145 .eval (MON_USER_INT1 << 0) | MON_USER_INT, MON_USER_INT
146 .eval (MON_USER_INT2 << 1) | MON_USER_INT, MON_USER_INT
147 .eval (MON_USER_INT3 << 2) | MON_USER_INT, MON_USER_INT
148 .eval (MON_USER_INT4 << 3) | MON_USER_INT, MON_USER_INT
149 .eval (MON_USER_INT5 << 4) | MON_USER_INT, MON_USER_INT
150 .eval (MON_USER_INT6 << 5) | MON_USER_INT, MON_USER_INT
151 .eval (MON_USER_INT7 << 6) | MON_USER_INT, MON_USER_INT
152 .eval (MON_USER_INT8 << 7) | MON_USER_INT, MON_USER_INT
153 00bf MON_INT_MSK .set MON_USER_INT
154 ;
TMS320C24xx COFF Assembler Version 7.02 Wed Apr 16 12:20:49 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
Monitor program for C25LP HLL Real-Time Debugger. PAGE 5
156 ;---------------------------------------------------------------------------
157 ; Define the analysis and message passing control registers addresses.
158 ;
159 ; MSG_DATA is used to access data via the message passing register.
160 ; MSG_CMND is used to access command via the message passing register.
161 ; MSG_STAT is used to check message status.
162 ; MSG_CNTL is used to configure analysis and message passing.
163 ;---------------------------------------------------------------------------
164 001c MSG_DATA .set 1Ch ; Analysis data register.
165 001d MSG_CMND .set 1Dh ; Analysis command register.
166 001e MSG_STAT .set 1Eh ; Analysis status register.
167 001f MSG_CNTL .set 1Fh ; Analysis control register.
168 ;
169 ;---------------------------------------------------------------------------
170 ; Define the MSG_STAT register masks and bits.
171 ;---------------------------------------------------------------------------
172 0001 STAT_XFER .set 01h ; Mask for good transfer.
173 0002 STAT_RFUL .set 02h ; Mask for read buffer full.
174 0004 STAT_CMND .set 04h ; Mask for command type message.
175 0008 STAT_WFUL .set 08h ; Mask for write buffer full.
176 0010 STAT_ANYBP .set 10h ; Mask for message/breakpoint.
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -