f243adc2.asm

TI的digital motor control lib的源代码。了解TI的编程规范

                                ; ARP = AR3. AR3 -> c3_out.  
                                ; AR4 -> c3_gain. AR2 -> FR1 (i.e MASK)
;--------------------------------------------------------------------------            
       ;Read 3rd converted value
;--------------------------------------------------------------------------
                POINT_PF1    
                LACC    ADC_FIFO1
                                ; Load Accumulator with ADC_FIFO1 status 
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------                                
                SFR             ; Right shift Accumulator 
                                ; contents by one bit
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------                                
                AND     #7FFFh  ; Accumulator = Accumulator & 7FFFh
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------               
                SACL    *,AR4   ; Accumulator = c3_out
                                ; ARP = AR4. AR3 -> c3_out.
                                ; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                LT      *+,AR3  ; c3_gain in Q13 T->c3_gain
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                MPY     *       ; PREG = c3_gain *c3_out (Q13 x Q15 = Q28)
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                PAC             ; Accumulator = c1_gain *c1_out
                                ; ARP = AR3. AR3 -> c3_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                SACH    *+,3    ; Convert final result to Q15 
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
       ;Read 4th converted value
;--------------------------------------------------------------------------
                POINT_PF1    
                LACC    ADC_FIFO2
                                ; Load Accumulator with ADC_FIFO2 status  
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------                                
                SFR             ; Right shift Accumulator 
                                ; contents by one bit
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------                                
                AND     #7FFFh  ; Accumulator = Accumulator & 7FFFh
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------               
                SACL    *,AR4   ; Accumulator = c4_out
                                ; ARP = AR4. AR3 -> c4_out.
                                ; AR4 -> c4_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                LT      *,AR3   ; c4_gain in Q13 
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                MPY     *       ; PREG = c4_gain *c4_out (Q13 x Q15 = Q28)
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                PAC             ; Accumulator = c4_gain *c4_out
                                ; ARP = AR3. AR3 -> c4_out.
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
                SACH    *+,3    ; Convert final result to Q15 
                                ; ARP = AR3. AR3 -> a4_ch_sel.
                                ;  AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
 
                CLRC    SXM     ; sign extension mode off
 
    ;Start another conversion

F243_ADC_Start_Next:

                LACC    *,1,AR2 ; Accumulator = a4_ch_sel
                                ; ARP = AR2.   AR2 -> FR1 (i.e. MASK) 
                                ; AR3 -> a4_ch_sel. 
;--------------------------------------------------------------------------                                
                AND     #000Eh  ; Accumulator= Accumulator & 000Eh
                                ; ARP = AR2.   AR2 -> FR1 (i.e. MASK)
                                ; AR3 -> a4_ch_sel. 
;--------------------------------------------------------------------------            
                SACL    *,AR3   ; MASK = (a4_ch_sel*2) & (0x000E) 
                                ; ARP = AR3. .  AR2 -> FR1 (i.e. MASK)
                                ; AR3 -> a4_ch_sel. 
;--------------------------------------------------------------------------            
                LACC    *,AR2   ; Accumulator = a4_ch_sel
                                ; ARP = AR2. AR3 -> a4_ch_sel . 
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                AND     #0070h  ; Accumulator = a4_ch_sel & 0x0070
                                ; ARP = AR2. AR3 -> a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                OR      *,AR3   ; Accumulator = (a4_ch_sel & 0x0070) | MASK
                                ; ARP = AR3. AR3 -> a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                OR      #1101100100000001b
                        ;5432109876543210 
                                ; Accumulator = 
                                ;  ((a4_ch_sel & 0x0070) | MASK) | 0XD901)
                                ; ARP = AR3. AR3 -> a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------                        
                POINT_PF1
                SACL    ADC_CNTL1
                                ; Start 1st Dual conversion
                                ; *ADC_CNTL1 = Accumulator
                                ; ARP = AR3. AR3 -> a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                LACC    *,9,AR2 ; Accumulator = a4_ch_sel<<9
                                ; ARP = AR2. AR3 ->a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                AND     #000Eh,16
                                ; Accumulator = (a4_ch_sel<<9) & (0x000E<<16) 
                                ; ARP = AR2. AR3 -> a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------            
                SACH    *+,AR3  ; MASK = Most Significant Word 
                                ; of Accumulator 
                                ; ARP = AR3. AR3 -> a4_ch_sel. 
                                ; AR2 -> FR2(i.e. GPR1ADC)
;--------------------------------------------------------------------------            
                LACC    *,8,AR2 ; Accumulator = a4_ch_sel
                                ; ARP = AR2. 
                                ; AR2 -> FR2(i.e. GPR1ADC)
                                
;---------------------------------------------------------------------------            
                AND     #0070h,16
                                ; Accumulator = (a4_ch_sel) & (0x0070 << 16)
                                ; ARP = AR2. AR3 -> a4_ch_sel. 
                                ; AR2 -> FR2(i.e. GPR1ADC)
                               
;--------------------------------------------------------------------------            
                SACH    *       ; GPR1ADC = Most Significant 
                                ; Word Of Accumulator
                                ; ARP = AR2. 
                                ; AR2 -> FR2(i.e. GPR1ADC)
                                
;--------------------------------------------------------------------------            
                LACC    *-      ; Accumulator = GPR1ADC
                                ; ARP = AR2. AR3 ->a4_ch_sel .  
                                ; AR2 -> FR1 (i.e. MASK)
                               
;--------------------------------------------------------------------------            
                OR      *,AR1   ; Accumulator = GPR1ADC | MASK
                                ; Set ARP = AR1. in preparation for exit.
;-------------------------------------------------------------------------            
                OR  #1101100100000001b
                                ; Accumulator = GPR1ADC | MASK | 0xD901
                                ; ARP = AR1.
;--------------------------------------------------------------------------                                    
                POINT_PF1  
                SACL    ADC_CNTL1
                                ; ADC_CNTL2 = GPR1ADC | MASK | 0xD901
                                ; Start 2nd Dual conversion
               
  
__f243_adc_update_exit:
                
    
    SBRK    #(__F243_ADC_Update_framesize+1)
                                ; deallocate frame, point to saved FP
    LAR     AR0, *-             ; restore frame pointer
    PSHD    *                   ; push return address on hardware stack
                   
    RET
                   
    .end