f2407adc2.asm

TI的digital motor control lib的源代码。了解TI的编程规范

;=====================================================================================================================
; File name:       F2407ADC2.ASM                    
;                    
; Originator:	Digital Control Systems Group
;			Texas Instruments
; Description:                                   
; This file contains source for the ADC Driver control module
; Applicability of these functions is indicated in the Table 1               
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000	Release	Rev 1.0
;================================================================================
; Applicability: F240,F241,C242,F243,F24xx.  (Peripheral dependant).
;
;================================================================================
;                           T A B L E      1                                 
;================================================================================
;     Function Name    |    Applicability                                    
;================================================================================
;                      |      F240 | F241| F243 | LF2402 | LF2406 | LF2407   
;                      |           |     |      |        |        |          
; F2407_ADC_Update     |           |     |      |        |        |  Y        
;================================================================================

;================================================================================
; Routine Name: ADC DRIVER           Routine Type: C Callable
;
; Description:
;  
; C prototype : void F2407_ADC_Update(ADCVALS *p);
; History   created August 21,2000
;================================================================================
; Definition of ADCVALS
;
;typedef struct {
;                int C1_gain;
;                int C2_gain;
;                int C3_gain;
;                int C4_gain;           
;
;                int C1_out;
;                int C2_out;
;                int C3_out;
;                int C4_out;               
;
;                int A4_ch_sel;
;                int (*init)();                                 
;                int (*update)();                               
;             } ADCVALS;
;
;
;                        
                .include ..\include\x240x.h

                .def  _F2407_ADC_Update   
;================================================================================                       

_F2407_ADC_Update: 

__F2407_ADC_Update_framesize  .set 0001h

   
;--------------------------------------------------------------------------
                                ; ARP = AR1

                                ; AR1 is  stack pointer (SP)
                                ; AR0 is frame pointer (FP)
      
    POPD *+                     ; Save the return address from hardware
                                ; stack onto the software stack
                                ; ARP = AR1
    
    SAR  AR0, *+                ; push AR0(FP). ARP =AR1
    SAR  AR1, *                 ; *SP = SP. ARP =AR1
    LAR  AR0, #__F2407_ADC_Update_framesize 
                                ; FP  = size of frame 
    LAR  AR0, *0+, AR0          ; ARP = AR0.
                                ; Allocate frame. AR0 = *AR1
                                ; AR1 = AR1 + AR0.    
;--------------------------------------------------------------------------
                SBRK    #3      ; AR0 -> Passed parameter(i.e. pointer
                                ; to the ADCVALS structure)
                                ; ARP = AR0.
;--------------------------------------------------------------------------
                LAR     AR2,*   ; AR2 points to the first structure member  
                                ; (i.e. AR2 -> c1_gain). ARP = AR0.
;--------------------------------------------------------------------------
                LAR     AR3,*   ; AR3 points to the first structure member 
                                ; (i.e. AR3 -> c1_gain). ARP = AR0.
                                ; AR2 -> c1_gain.
;--------------------------------------------------------------------------
                ADRK    #3      ; Let AR0  be again FP.
                                ; AR3 -> c1_gain. AR2 -> c1_gain
;--------------------------------------------------------------------------                                
                MAR     *,AR2   ; ARP = AR2.
                                ; AR3 -> c1_gain. AR2 -> c1_gain
;--------------------------------------------------------------------------
                LDP     #ADCL_CNTL1 >>7
                LACC    ADC_RESULT0 
                                ; Load Accumulator with 
                                ; ADC_RESULT0 status 
                                ; ARP = AR2.,AR2 -> c1_gain. 
                                ; AR3 -> c1_gain
;--------------------------------------------------------------------------                                
                SFR             ; Right shift Accumulator 
                                ; contents by one bit
                                ; ARP = AR2.  AR2-> c1_gain. 
                                ; AR3 -> c1_gain
;--------------------------------------------------------------------------                                
                AND     #7FFFh  ; Accumulator = Accumulator & 7FFFh
                                ; ARP = AR2. AR2-> c1_gain. 
                                ; AR3 -> c1_gain
;--------------------------------------------------------------------------                                    
                ADRK    #4      ; Points to c1_out
                                ; ARP = AR2. AR2-> c1_out. 
                                ; AR3 -> c1_gain
;--------------------------------------------------------------------------               
                SACL    *,AR3   ; Accumulator = c1_out
                                ; ARP = AR3. AR2 -> c1_out. 
                                ; AR3 -> c1_gain
;--------------------------------------------------------------------------
                LT      *+,AR2  ; TREG = c1_gain in Q13 
                                ; ARP = AR2. AR2 -> c1_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------
                MPY     *       ; PREG = c1_gain * c1_out (Q13 x Q15 = Q28)
                                ; ARP = AR2. AR2 -> c1_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------
                PAC             ; Accumulator = c1_gain * c1_out
                                ; ARP = AR2. AR2 -> c1_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------
                SACH    *+,3    ; Convert final result to Q15 
                                ; ARP = AR2. AR2 -> c2_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------            
       ;Read 2nd converted value
        
                LDP     #ADCL_CNTL1 >>7
                LACC    ADC_RESULT1
                                ; Load Accumulator with ADC_RESULT1 status  
                                ; ARP = AR2. AR2 -> c2_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------                                
                SFR             ; Right shift Accumulator 
                                ; contents by one bit
                                ; ARP = AR2. AR2 -> c2_out. 
                                ; AR3 -> c2_gain
;--------------------------------------------------------------------------