📄 f2407ilg2.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f2407ilg2.asm -o ..\obj\f2407ilg2.obj -l ..\temp\f2407ilg2.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f2407ilg2.asm PAGE 1
1 ;===============================================================================================================
2 ; File name: F2407ILG2.ASM
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ; Description:
7 ; This file contains source for a the F2407 Two leg current measurement driver.
8 ;=====================================================================================
9 ; History:
10 ;-------------------------------------------------------------------------------------
11 ; 9-15-2000 Release Rev 1.0
12 ;================================================================================
13 ;
14 ; Applicability: F2407 : Peripheral Dependant
15 ; ____________________
16 ;
17 ;================================================================================
18 ; Routine Name: Generic function. Routine Type: C Callable
19 ;
20 ; Description:
21 ;
22 ; C prototype : int F2407_leg2_drv_read(ILEG2MEAS *p)
23 ;
24 ;
25 ; typedef struct { int gain_a,
26 ; int offset_a,
27 ; int out_a,
28 ; int gain_b,
29 ; int offset_b,
30 ; int out_b,
31 ; int ch_a,
32 ; int ch_b,
33 ; int (*init)(),
34 ; int (*read)();
35 ; } ILEG2MEAS ;
36 ;================================================================================
37 .def _F2407_leg2_drv_read
38 ;================================================================================
39 .include ..\include\x240x.h
40 ;================================================================================
41
42 0001 __F2407_leg2_drv_read_framesize .set 0001h
43 ;================================================================================
44 0000 _F2407_leg2_drv_read:
45 0000 8aa0 POPD *+
46 0001 80a0 SAR AR0,*+
47 0002 8180 SAR AR1,*
48 0003 b001 LARK AR0,__F2407_leg2_drv_read_framesize
49 0004 00e8 LAR AR0,*0+,AR0
50 ;================================================================================
51 0005 7c03 SBRK #3 ; Point AR0 to the first argument.
52 ;--------------------------------------------------------------------------------
53 0006 0280 LAR AR2,* ; get the argument.
54 ;--------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f2407ilg2.asm PAGE 2
55 0007 7803 ADRK #3 ; Restore AR0
56 ; ARP=AR0, AR0->FR1, AR2->gain_a
57 ;--------------------------------------------------------------------------------
58 0008 8b8b MAR *,AR3 ; ARP=AR3, AR0->FR1, AR2->gain_a
59 ;--------------------------------------------------------------------------------
60 0009 bf0b LAR AR3,#ADCTRL2
000a 70a1
61 ; ARP=AR3, AR0->FR1, AR2->gain_a, AR3->ADC_CNTL2
62 ;--------------------------------------------------------------------------------
63 000b 4380 WAIT_ADC BIT *,BIT12 ; poll ADC Flag to wait for compl. of conv.
64 ; ARP=AR3, AR0->FR1, AR2->gain_a, AR3->ADC_CNTL2
65 ;--------------------------------------------------------------------------------
66 000c e100 BCND WAIT_ADC,TC
000d 000b'
67 ; ARP=AR3, AR0->FR1, AR2->gain_a, AR3->ADC_CNTL2
68 ; Loop on the ADC Flag for completion
69 ;--------------------------------------------------------------------------------
70 000e 7807 ADRK #7 ; ARP=AR3, AR0->FR1, AR2->gain_a, AR3->RESULT0
71 ;--------------------------------------------------------------------------------
72 000f 1088 LACC *,AR0 ; Get the result of the conversion1.
73 ; ARP=AR0, AR0->FR1, AR2->gain_a, AR3->RESULT0
74 ;--------------------------------------------------------------------------------
75 0010 bfd0 XOR #8000h ; Convert result to Q15.
0011 8000
76 ; ARP=AR0, AR0->FR1, AR2->gain_a, AR3->RESULT0
77 ;--------------------------------------------------------------------------------
78 0012 9080 SACL * ; Store Q15 number in FR1
79 ; ARP=AR0, AR0->FR1, AR2->gain_a, AR3->RESULT0
80 ;--------------------------------------------------------------------------------
81 0013 738a LT *,AR2 ; TREG= (out_a in q15 format).
82 ; ARP=AR2, AR0->FR1, AR2->gain_a, AR3->RESULT0
83 ;--------------------------------------------------------------------------------
84 0014 54a0 MPY *+ ; Multiply by the gain in Q13 format.
85 ; Q15 x Q13 = Q28.
86 ; ARP=AR2, AR0->FR1, AR2->offset_a,AR3->RESULT0
87 ;--------------------------------------------------------------------------------
88 0015 be03 PAC ; PREG->ACC.
89 ; ARP=AR2, AR0->FR1, AR2->offset_a,AR3->RESULT0
90 ;--------------------------------------------------------------------------------
91 0016 2da0 ADD *+,13 ; Add in the offset to Q28 number.
92 ; ARP=AR2, AR0->FR1, AR2->out_a, AR3->RESULT0
93 ;--------------------------------------------------------------------------------
94 0017 be02 NEG ; Positive direction, current flows to motor
95 ;--------------------------------------------------------------------------------
96 0018 9bab SACH *+,3,AR3 ; ARP=AR3, AR0->FR1, AR2->gain_b, AR3->RESULT0
97 ;--------------------------------------------------------------------------------
98 0019 7801 ADRK #1 ; ARP=AR3, AR0->FR1, AR2->gain_b, AR3->RESULT1
99 ;--------------------------------------------------------------------------------
100 001a 1088 LACC *,AR0 ; Get the result of the conversion2.
101 ; ARP=AR0, AR0->FR1, AR2->gain_b, AR3->ADCFIFO2
102 ;--------------------------------------------------------------------------------
103 001b bfd0 XOR #8000h ; Convert result to Q15.
001c 8000
104 ; ARP=AR0, AR0->FR1, AR2->gain_b, AR3->ADCFIFO2
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f2407ilg2.asm PAGE 3
105 ;--------------------------------------------------------------------------------
106 001d 9080 SACL * ; Store Q15 number in FR1
107 ; ARP=AR0, AR0->FR1, AR2->gain_b, AR3->ADCFIFO2
108 ;--------------------------------------------------------------------------------
109 001e 738a LT *,AR2 ; TREG= (out_b in q15 format).
110 ; ARP=AR2, AR0->FR1, AR2->gain_b, AR3->ADCFIFO2
111 ;--------------------------------------------------------------------------------
112 001f 54a0 MPY *+ ; Multiply by the gain in Q13 format.
113 ; Q15 x Q13 = Q28.
114 ; ARP=AR2, AR0->FR1, AR2->offset_b, AR3->ADCFIFO2
115 ;--------------------------------------------------------------------------------
116 0020 be03 PAC ; PREG->ACC.
117 ; ARP=AR2, AR0->FR1, AR2->offset_b, AR3->ADCFIFO2
118 ;--------------------------------------------------------------------------------
119 0021 2da0 ADD *+,13 ; Add in the offset to Q28 number.
120 ; ARP=AR2, AR0->FR1, AR2->out_b, AR3->ADCFIFO2
121 ;--------------------------------------------------------------------------------
122 0022 be02 NEG ; Positive direction, current flows to motor
123 ;--------------------------------------------------------------------------------
124 0023 9b89 SACH *,3,AR1 ; ARP=AR1, AR0->FR1, AR2->out_b, AR3->ADCFIFO2
125 ;--------------------------------------------------------------------------------
126 0024 __F2407_leg2_drv_read_exit:
127
128 0024 7c02 SBRK #(__F2407_leg2_drv_read_framesize+1)
129 0025 0090 LAR AR0,*-
130 0026 7680 PSHD *
131 0027 ef00 RET
132
133
No Errors, No Warnings
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