f243adc2.lst

TI的digital motor control lib的源代码。了解TI的编程规范

C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f243adc2.asm -o ..\obj\f243adc2.obj -l ..\temp\f243adc2.lst 

TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:44 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f243adc2.asm                                                         PAGE    1

       1            ;===============================================================================================================
       2            ; File name:        F243ADC2.ASM                    
       3            ;                    
       4            ; Originator:   Digital Control Systems Group
       5            ;                       Texas Instruments
       6            ; Description:                                   
       7            ; This file contains source for the ADC Driver control module
       8            ; Applicability of these functions is indicated in the Table 1               
       9            ;=====================================================================================
      10            ; History:
      11            ;-------------------------------------------------------------------------------------
      12            ; 9-15-2000     Release Rev 1.0
      13            ;================================================================================
      14            ; Applicability: F240,F241,C242,F243,F24xx.  (Peripheral dependant).
      15            ;
      16            ;================================================================================
      17            ;                           T A B L E      1                                 
      18            ;================================================================================
      19            ;     Function Name    |    Applicability                                    
      20            ;================================================================================
      21            ;                      |      F240 | F241| F243 | LF2402 | LF2406 | LF2407   
      22            ;                      |           |     |      |        |        |          
      23            ; F243_ADC_Update      |       Y   |  Y  |  Y   |        |        |          
      24            ;================================================================================
      25            
      26            ;================================================================================
      27            ; Routine Name: ADC DRIVER           Routine Type: C Callable
      28            ;
      29            ; Description:
      30            ;  
      31            ; C prototype : void F243_ADC_Update(ADCVALS *p);
      32            ; History   created July 27,2000
      33            ;================================================================================
      34            ; Definition of ADCVALS
      35            ;
      36            ;typedef struct {
      37            ;                int C1_gain;
      38            ;                int C2_gain;
      39            ;                int C3_gain;
      40            ;                int C4_gain;           
      41            ;
      42            ;                int C1_out;
      43            ;                int C2_out;
      44            ;                int C3_out;
      45            ;                int C4_out;               
      46            ;
      47            ;                int A4_ch_sel;
      48            ;                int (*init)();                                 
      49            ;                int (*update)();                               
      50            ;             } ADCVALS;
      51            ;
      52            ;
      53            ;       Frame Usage Details:
      54            ;            |      a      |      b                   c            d
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:44 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f243adc2.asm                                                         PAGE    2

      55            ;____________|_____________|____________________  ____________________________
      56            ;       FR0  |             |                    |
      57            ;       FR1  |  MASK       |                    |
      58            ;       FR2  |  GPR1ADC    |                    |                            
      59            ;================================================================================                    
      60            
      61                            .include ..\include\x24x.h
      62            
      63                            .def  _F243_ADC_Update   
      64            
      65            POINT_PF1   .macro
      66                LDP #0E0h
      67                .endm
      68            
      69            ;================================================================================                       
      70            
      71 0000       _F243_ADC_Update:
      72            
      73      0003  __F243_ADC_Update_framesize .set 0003h    
      74            ;--------------------------------------------------------------------------
      75                                            ; ARP=AR1
      76            
      77                                            ; AR1 - stack pointer (SP)
      78                                            ; AR0 - frame pointer (FP)
      79                  
      80 0000 8aa0      POPD *+                     ; Save the return address from hardware
      81                                            ; stack onto the software stack
      82                                            ; ARP = AR1
      83                
      84 0001 80a0      SAR  AR0, *+                ; Push AR0(FP).ARP = AR1
      85 0002 8180      SAR  AR1, *                 ; *SP = SP .ARP = AR1
      86 0003 b003      LAR  AR0, #__F243_ADC_Update_framesize 
      87                                            ; AR0 = size of frame. ARP = AR1 
      88            
      89 0004 00e8      LAR  AR0, *0+, AR0          ; ARP = AR0. AR0 = AR1 + AR0.  
      90                                            ; AR1 is the Stack Pointer (SP)
      91                                            ; AR0 is the Frame Pointer (FP)   
      92            ;--------------------------------------------------------------------------
      93 0005 7c03                  SBRK    #3      ; AR0 -> Passed parameter( i.e Pointer 
      94                                            ; to the ADC structure)
      95                                            ; ARP = AR0.
      96            ;--------------------------------------------------------------------------
      97 0006 0380                  LAR     AR3,*   ; AR3 points to the first structure member 
      98                                            ; (i.e. AR3 -> c1_gain).
      99                                            ; ARP = AR0. 
     100            ;--------------------------------------------------------------------------
     101 0007 0480                  LAR     AR4,*   ; AR4 points to the first structure member
     102                                            ; (i.e. AR4 -> c1_gain)
     103                                            ; ARP = AR0.  AR3 -> c1_gain
     104            ;--------------------------------------------------------------------------
     105 0008 7803                  ADRK    #3      ; Let AR0  be again FP.
     106                                            ; AR3 -> c1_gain. AR4 -> c1_gain 
     107                                            ; ARP = AR0. AR0 -> FR0. 
     108            ;--------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:44 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f243adc2.asm                                                         PAGE    3

     109 0009 b201                  LAR     AR2,#1  ; AR2 = 1
     110                                            ; ARP = AR0.  AR0 -> FR0. 
     111                                            ; AR3 -> c1_gain. AR4 -> c1_gain 
     112            ;--------------------------------------------------------------------------                                
     113 000a 8b8a                  MAR     *,AR2   ; ARP = AR2
     114                                            ; AR3 -> c1_gain. AR4 -> c1_gain 
     115                                            ; AR0 -> FR0.
     116            ;--------------------------------------------------------------------------
     117 000b 8beb                  MAR     *0+,AR3 ; AR2 = AR0 + 1
     118                                            ; AR2 -> FR1 (i.e. MASK)
     119                                            ; ARP = AR3. AR3 -> c1_gain. 
     120                                            ; AR4 -> c1_gain 
     121            ;--------------------------------------------------------------------------
     122 000c be47                  SETC    SXM     ; Sign extension mode on
     123                                            ; AR2 -> FR1 (i.e. MASK)
     124                                            ; ARP = AR3. AR3 -> c1_gain. 
     125                                            ; AR4 -> c1_gain 
     126            ;--------------------------------------------------------------------------
     127 000d                       POINT_PF1    
1        000d bce0      LDP #0E0h
     128 000e 1036                  LACC    ADC_FIFO1
     129                                            ; Load Accumulator with 
     130                                            ; ADC_FIFO1 status 
     131                                            ; ARP = AR3. AR3 -> c1_gain.