f07pwmdac2.lst

TI的digital motor control lib的源代码。了解TI的编程规范

      91 000d bf00                  SPM     0       ; Reset product mode
      92                                                    ; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
      93            ;--------------------------------------------------------------------------------
      94            ;Convert and update the appropriate timer 3 period
      95            ;--------------------------------------------------------------------------------
      96 000e 7388                  LT              *,AR0   ; TREG = pwmdac_period  (Q0)
      97                                                            ; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), A
      98            ;--------------------------------------------------------------------------------
      99 000f ae80          SPLK    #15,*   ; FR0 = 15
         0010 000f  
     100                                                    ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
     101            ;--------------------------------------------------------------------------------
     102 0011 5480          MPY             *               ; PREG = pwmdac_period*15 (*1000nS/(2*33nS))
     103                                                    ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)   
     104            ;--------------------------------------------------------------------------------
     105 0012 908c          SACL    *,AR4   ; FR0 = dac_period = pwmdac_period*15 
     106                                                    ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), ARP=AR4  
     107            ;--------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:13 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f07pwmdac2.asm                                                       PAGE    3

     108 0013 bf0c          LAR     AR4,#T3PERB ; point AR4 to T3PERB 
         0014 7503  
     109                                                    ; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PE
     110            ;--------------------------------------------------------------------------------
     111 0015 9088          SACL    *,AR0   ; T3PERB = pwmdac_period*15 
     112                                    ; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB, ARP=AR0
     113            ;--------------------------------------------------------------------------------
     114            ;Convert Q15 input value to an appropriate compare value for PWM7 or PWM8 signal
     115            ;--------------------------------------------------------------------------------
     116 0016 738b                  LT              *,AR3   ; TREG = dac_period
     117                                                            ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), A
     118            ;--------------------------------------------------------------------------------
     119 0017 5488          MPY             *,AR0   ; PREG = dac_period*(PWM_DAC_IPTR0)/2
     120                                                    ; ARP=AR3, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PE
     121            ;--------------------------------------------------------------------------------
     122 0018 be03          PAC                             ; ACC = dac_period*(PWM_DAC_IPTR0)/2
     123                                                    ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PE
     124            ;--------------------------------------------------------------------------------
     125 0019 2f8c          ADD             *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR0)/2 + dac_period/2
     126                                                    ; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PE
     127            ;--------------------------------------------------------------------------------
     128 001a bf0c          LAR     AR4,#CMPR4B ; point AR4 to CMPR4B 
         001b 7517  
     129                                                    ; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->CMPR
     130            ;--------------------------------------------------------------------------------
     131 001c 98aa          SACH    *+,AR2  ; CMPR4B = dac_period*(PWM_DAC_IPTR0)/2 + dac_period/2
     132                                                    ; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->CMPR
     133            ;--------------------------------------------------------------------------------
     134            ;Convert Q15 input value to an appropriate compare value for PWM9 or PWM10 signal
     135            ;--------------------------------------------------------------------------------
     136 001d 7c02          SBRK    #2              ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR1, AR3->(PWM_DAC_IPTR0), AR4->CMPR5B 
     137            ;--------------------------------------------------------------------------------
     138 001e 03ab                  LAR             AR3,*+,AR3 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->C
     139            ;--------------------------------------------------------------------------------
     140 001f 5488          MPY             *,AR0   ; PREG = dac_period*(PWM_DAC_IPTR1)/2
     141                                                    ; ARP=AR3, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR
     142            ;--------------------------------------------------------------------------------
     143 0020 be03          PAC                             ; ACC = dac_period*(PWM_DAC_IPTR1)/2
     144                                                    ; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR
     145            ;--------------------------------------------------------------------------------
     146 0021 2f8c          ADD             *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR1)/2 + dac_period/2
     147                                                    ; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR
     148            ;--------------------------------------------------------------------------------
     149 0022 98aa          SACH    *+,AR2  ; CMPR5B = dac_period*(PWM_DAC_IPTR1)/2 + dac_period/2
     150                                                    ; ARP=AR4, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR
     151            ;--------------------------------------------------------------------------------
     152            ;Convert Q15 input value to an appropriate compare value for PWM11 or PWM12 signal
     153            ;--------------------------------------------------------------------------------
     154 0023 038b                  LAR             AR3,*,AR3 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CM
     155            ;--------------------------------------------------------------------------------
     156 0024 5488          MPY             *,AR0   ; PREG = dac_period*(PWM_DAC_IPTR2)/2
     157                                                    ; ARP=AR3, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR
     158            ;--------------------------------------------------------------------------------
     159 0025 be03          PAC                             ; ACC = dac_period*(PWM_DAC_IPTR2)/2
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:13 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f07pwmdac2.asm                                                       PAGE    4

     160                                                    ; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR
     161            ;--------------------------------------------------------------------------------
     162 0026 2f8c          ADD             *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR2)/2 + dac_period/2
     163                                                    ; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR
     164            ;--------------------------------------------------------------------------------
     165 0027 9889          SACH    *,AR1   ; CMPR6B = dac_period*(PWM_DAC_IPTR2)/2 + dac_period/2
     166                                                    ; ARP=AR4, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR
     167            ;--------------------------------------------------------------------------------
     168 0028       _F2407_PWMDAC_Update_exit:
     169                    ;MAR    *,AR1   ; can be removed if this condition is met on
     170                    ;                ; every path to this code. (i.e., ARP=AR1 here)
     171                    
     172 0028 7c02          SBRK    #(__F2407_PWMDAC_Update_framesize+1)
     173 0029 0090          LAR     AR0,*-
     174 002a 7680          PSHD    *
     175 002b ef00          RET
     176            

 No Errors,  No Warnings