📄 f243pwm2.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f243pwm2.asm -o ..\obj\f243pwm2.obj -l ..\temp\f243pwm2.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:43 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243pwm2.asm PAGE 1
1 ;===============================================================================================================
2 ; File name: F243PWM2.ASM
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ; Description:
7 ; This file contains source for the Full Compare PWM drivers for the F243
8 ; Applicability of these functions is indicated in the Table 1
9 ;=====================================================================================
10 ; History:
11 ;-------------------------------------------------------------------------------------
12 ; 9-15-2000 Release Rev 1.0
13 ;================================================================================
14 ; T A B L E 1
15 ;================================================================================
16 ; Function Name | Applicability
17 ;================================================================================
18 ; | F240 | F241| F243 | LF2402 | LF2406 | LF2407
19 ; | | | | | |
20 ; F243_PWM_Update | | Y | Y | | |
21 ;================================================================================
22 ;================================================================================
23 ; Routine Name: PWM Update Routine Routine Type: C Callable
24 ;
25 ; Description:
26 ;
27 ; Sine Module
28 ;
29 ; C prototype : int F243_PWM_Update(PWMGEN *p)
30 ;================================================================================
31 ;
32 ; History:
33 ; __________________________________________________________________________
34 ; Date of Mod | DESCRIPTION
35 ; ------------|-----------------------------------------------------------
36 ; |
37 ; |
38 ; |
39 ; |
40 ;================================================================================
41 ; Definition of the argument structure.
42 ; struct _PWMGEN_struct
43 ;{
44 ; int period, period_mod ;
45 ; int duty_cycle1, duty_cycle2, duty_cycle3; /* Duty cycle ratios */
46 ; int (*init)(); /* Initialization func pointer */
47 ; int (*update)(); /* Update function */
48 ;
49 ;
50 ;
51 ;
52 .def _F243_PWM_Update
53 .include ..\include\x24x.h
54
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:43 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243pwm2.asm PAGE 2
55 0000 _F243_PWM_Update:
56
57 0002 __F243_PWM_Update_framesize .set 0002h
58
59 0000 8aa0 POPD *+
60 0001 80a0 SAR AR0,*+
61 0002 8180 SAR AR1,*
62 0003 b002 LARK AR0,__F243_PWM_Update_framesize
63 0004 00e8 LAR AR0,*0+,AR0
64
65 ;================================================================================
66
67 0005 7c03 SBRK #3 ; Point to ARG1 (in this case period)
68 ; AR0=(FP0)-3
69 0006 0280 LAR AR2,* ; get pointer to ARG in AR2.
70
71
72 ; This first arg is the pointer to the structure,
73 ; and by LAR AR2,* we get that pointer in AR2. As a result AR2 now
74 ; points to PWMGEN_struct, as defined above.
75 ;--------------------------------------------------------------------------------
76 0007 bf0b LAR AR3,#CMPR1 ; point AR3 to CMPR1.
0008 7417
77
78
79 ;--------------------------------------------------------------------------------
80 0009 8b88 MAR *,AR0
81 000a 7803 ADRK #3 ; Point AR0 back to FP0.
82 ;--------------------------------------------------------------------------------
83 000b 8b8a MAR *,AR2 ; Make AR2 the current ARP.
84 ; AR2 now points to period.
85 ;--------------------------------------------------------------------------------
86 000c 73a0 LT *+ ; Get period in TREG and point AR2 to
87 ; the next loc which is period_mod.
88 ;--------------------------------------------------------------------------------
89 000d 54a8 MPY *+,AR0 ; multiply by period_mod.
90 ; also increment AR2 to pt to duty_cycle1
91 ; set ARP=AR0 -> FP0.
92 ;--------------------------------------------------------------------------------
93 000e bf01 SPM 1 ; set appropriate product mode.
94 ;--------------------------------------------------------------------------------
95 000f be03 PAC
96 ; ACCH now contains the modified
97 ; period (Q0).
98 ;--------------------------------------------------------------------------------
99 0010 98a0 SACH *+ ; FR0 now contains the modified period.
100 ;--------------------------------------------------------------------------------
101 0011 be0a SFR ; divide by 2.
102 ; =prd.
103 ;--------------------------------------------------------------------------------
104 0012 9880 SACH * ; FR1 now contains the modified period/2.
105 ; prd
106 ;--------------------------------------------------------------------------------
107 0013 738a LT *,AR2 ; Get modified prd in TREG and ARP=AR2.
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:43 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243pwm2.asm PAGE 3
108 ;--------------------------------------------------------------------------------
109 0014 54a8 MPY *+,AR0 ; form prd*duty_cycle1 .
110 ; inc AR2 to point to duty_cycle2.
111 ; also ARP=AR0.
112 ;--------------------------------------------------------------------------------
113
114
115 0015 be03 PAC ; get cmpr1_value in ACCH. (Q0 in ACCH).
116 ;--------------------------------------------------------------------------------
117 0016 618b ADDH *,AR3 ; ACCH= prd*duty_cycle1 + prd.
118 ;--------------------------------------------------------------------------------
119 0017 98aa SACH *+,AR2 ; store cmpr1_value in CMPR1.
120 ; also incr AR3 to point to CMPR2,
121 ; and ARP=AR2.
122 ;--------------------------------------------------------------------------------
123 0018 54a8 MPY *+,AR0 ; form prd*duty_cycle2.
124 ; inc AR2 to point to duty_cycle3.
125 ; also ARP=AR0.
126 ;--------------------------------------------------------------------------------
127 0019 be03 PAC ; get cmpr2_value in ACCH. (Q0 in ACCH).
128 ;--------------------------------------------------------------------------------
129 001a 618b ADDH *,AR3 ; ACCH= prd*duty_cycle2 + prd.
130 ;--------------------------------------------------------------------------------
131 001b 98aa SACH *+,AR2 ; store cmpr2_value in CMPR2.
132 ; also incr AR3 to point to CMPR3,
133 ; and ARP=AR2.
134 ;--------------------------------------------------------------------------------
135 001c 5488 MPY *,AR0 ; form prd*duty_cycle3.
136 ; also ARP=AR0.
137 ;--------------------------------------------------------------------------------
138 001d be03 PAC ; get cmpr3_value in ACCH. (Q0 in ACCH).
139 ;--------------------------------------------------------------------------------
140 001e 619b ADDH *-,AR3 ; ACCH= prd*duty_cycle3 + prd.
141 ; decrement AR0 to pt to modified period.
142 ;--------------------------------------------------------------------------------
143 001f 9888 SACH *,AR0 ; store cmpr3_value in CMPR3.
144 ; and ARP=AR0.
145 ;--------------------------------------------------------------------------------
146 0020 bf0b LAR AR3,#T1PR ; point AR3 to T1 period register.
0021 7403
147 ;--------------------------------------------------------------------------------
148 0022 108b LACC *,AR3 ; get FR0 = modified_period.
149 ;--------------------------------------------------------------------------------
150 0023 9089 SACL *,AR1 ; store modified period in T1PR.
151 ; ARP=AR1 for return.
152 ;================================================================================
153 0024 bf00 SPM 0 ; restore compiler's product mode.
154 ;--------------------------------------------------------------------------------
155 0025 7c03 SBRK #(__F243_PWM_Update_framesize+1)
156 0026 0090 LAR AR0,*-
157 0027 7680 PSHD *
158 0028 ef00 RET
159
160
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:43 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243pwm2.asm PAGE 4
No Errors, No Warnings
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