📄 f243ilg1.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -v2xx -l -s -x -q ..\temp\f243ilg1.asm ..\obj\f243ilg1.obj -tC:\WINDOWS\TEMP\f243ilg1.tmp
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:32 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
..\temp\f243ilg1.asm PAGE 1
1 *******************************************************
2 * TMS320C2x/C2xx/C5x ANSI C Codegen Version 7.00
3 *******************************************************
4 ; C:\TIC2XX\C2000\CGTOOLS\BIN\DSPAC.EXE -v2xx -q f243ilg1.c C:\WINDOWS\TEMP\f243ilg1.if
5 ; dspopt NOT RUN
6 ; C:\TIC2XX\C2000\CGTOOLS\BIN\DSPCG.EXE -v2xx -o -q -o C:\WINDOWS\TEMP\f243ilg1.if C:\WINDOWS\TEMP\f243ilg
7 .port
8 .file "f243ilg1.c"
9 .file "..\include\regs24x.h"
10 .globl _portffff
11 .globl _port0
12 .globl _port1
13 .globl _port2
14 .globl _port3
15 .globl _port4
16 .file "..\include\F243ILG.h"
17
18 .stag .fake0,160
19 .member _gain_a,0,4,8,16
20 .member _offset_a,16,4,8,16
21 .member _out_a,32,4,8,16
22 .member _gain_b,48,4,8,16
23 .member _offset_b,64,4,8,16
24 .member _out_b,80,4,8,16
25 .member _ch_a,96,4,8,16
26 .member _ch_b,112,4,8,16
27 .member _init,128,148,8,16
28 .member _read,144,148,8,16
29 .eos
30 .sym _ILEG2MEAS,0,8,13,160,.fake0
31 .globl _F243_leg2_drv_init
32 .globl _F243_leg2_drv_read
33 .file "f243ilg1.c"
34 0000 .text
35
36 .sym _F243_leg2_drv_init,_F243_leg2_drv_init,32,2,0
37 .globl _F243_leg2_drv_init
38
39 .func 40
40 ;>>>> void inline F243_leg2_drv_init(ILEG2MEAS *p)
41 ******************************************************
42 * FUNCTION DEF : _F243_leg2_drv_init
43 ******************************************************
44 0000 _F243_leg2_drv_init:
45
46 0000 LF1 .set 0
47
48 0000 8aa0 POPD *+
49 0001 80a0 SAR AR0,*+
50 0002 8180 SAR AR1,*
51 0003 b001 LARK AR0,1
52 0004 00eb LAR AR0,*0+,AR3
53
54 .sym _p,-3+LF1,24,9,16,.fake0
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:32 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
..\temp\f243ilg1.asm PAGE 2
55 .line 2
56 .line 3
57 ;>>>> GPTCON=((GPTCON&0xfcff)|0x80);
58 0005 bf0b LARK AR3,29696
0006 7400
59 0007 bf80 LACK 64767
0008 fcff
60 0009 6e80 AND *
61 000a bfc0 ORK 128
000b 0080
62 000c 908c SACL * ,AR4
63 .line 4
64 ;>>>> ADCTRL2=ADCTRL2_INIT_STATE;
65 000d bf0c LARK AR4,28724
000e 7034
66 000f ae8a SPLK #1024,* ,AR2
0010 0400
67 .line 5
68 ;>>>> ADCTRL1=ADCTRL1_INIT_STATE+(((p->ch_b)<<4)&ADC2CHSEL_7)+(((p->ch_a)<<1)&ADC1CHSEL_7);
69 0011 bf0a LARK AR2,-3+LF1
0012 fffd
70 0013 8be0 MAR *0+
71 0014 058d LAR AR5,* ,AR5
72 0015 7806 ADRK 6
73 0016 11a9 LAC *+,1,AR1
74 0017 bfb0 ANDK 14
0018 000e
75 0019 908d SACL * ,AR5
76 001a 1489 LAC * ,4,AR1
77 001b bfb0 ANDK 112
001c 0070
78 001d bf90 ADDK 63488
001e f800
79 001f 208c ADD * ,AR4
80 0020 7c02 SBRK 2
81 0021 9089 SACL * ,AR1
82 0022 EPI0_1:
83 .line 6
84 0022 7c02 SBRK 2
85 0023 0090 LAR AR0,*-
86 0024 7680 PSHD *
87 0025 ef00 RET
88
89 .endfunc 45,000000000H,1
90 .end
No Errors, No Warnings
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:32 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
..\temp\f243ilg1.asm PAGE 3
LABEL VALUE DEFN REF
.TMS32010 0000 0
.TMS32016 0000 0
.TMS32020 0000 0
.TMS32025 0000 0
.TMS3202XX 0001 0
.TMS32050 0000 0
.TMS32056 0000 0
.TMS32057 0000 0
.TMS320XX 001d 0
.tms32010 0000 0
.tms32016 0000 0
.tms32020 0000 0
.tms32025 0000 0
.tms3202xx 0001 0
.tms32050 0000 0
.tms32056 0000 0
.tms32057 0000 0
.tms320xx 001d 0
EPI0_1 0022 ' 82
LF1 0000 46 54 69
_F243_leg2_drv_init 0000 ' 44 31 36 36 37
_F243_leg2_drv_read REF 32
_port0 REF 11
_port1 REF 12
_port2 REF 13
_port3 REF 14
_port4 REF 15
_portffff REF 10
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