f07ilvd2.lst

TI的digital motor control lib的源代码。了解TI的编程规范

C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f07ilvd2.asm -o ..\obj\f07ilvd2.obj -l ..\temp\f07ilvd2.lst 

TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:11 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f07ilvd2.asm                                                         PAGE    1

       1            ;===============================================================================================================
       2            ; File name:        F07ILVD2.ASM                     
       3            ;                    
       4            ; Originator:   Digital Control Systems Group
       5            ;                       Texas Instruments
       6            ; Description:                                   
       7            ; This file contains source for a the F2407 Two leg current measurement 
       8            ; and DC-bus measurement driver.
       9            ;=====================================================================================
      10            ; History:
      11            ;-------------------------------------------------------------------------------------
      12            ; 9-15-2000     Release Rev 1.0
      13            ;================================================================================
      14            ;                            
      15            ; Applicability: F2407 : Peripheral Dependant
      16            ;                            ____________________
      17            ;
      18            ;================================================================================
      19            ; Routine Name: Generic function.                    Routine Type: C Callable
      20            ;
      21            ; Description:
      22            ;  
      23            ;  C prototype : int F2407_ileg2_dcbus_drv_read(ILEG2DCBUSMEAS *p)
      24            ;
      25            ;            
      26            ; typedef struct {      int Imeas_a_gain;    /* Parameter: gain for Ia (Q13) */
      27            ;                       int Imeas_a_offset;  /* Parameter: offset for Ia (Q15) */
      28            ;                       int Imeas_a;         /* Output: measured Ia (Q15) */
      29            ;                       int Imeas_b_gain;    /* Parameter: gain for Ib (Q13) */
      30            ;                       int Imeas_b_offset;  /* Parameter: offset for Ib (Q15) */
      31            ;                       int Imeas_b;         /* Output: measured Ib (Q15) */
      32            ;                       int Vdc_meas_gain;   /* Parameter: gain for Vdc (Q13) */
      33            ;                       int Vdc_meas_offset; /* Parameter: offset for Vdc (Q15) */
      34            ;                       int Vdc_meas;        /* Output: measured Vdc (Q15) */
      35            ;                                               int Imeas_c;             /* Output: computed Ic (Q15) */        
      36            ;                       int Ch_sel;          /* Parameter: ADC channel selection */
      37            ;                       int (*init)();       /* Pointer to the init function */
      38            ;                       int (*read)();       /* Pointer to the read function */
      39            ;               } ILEG2DCBUSMEAS;
      40            ;                        
      41            ;        Frame Usage Details:
      42            ;     step   |      a      |      b       |      c       |     d     
      43            ;____________|_____________|______________|______________|_____________
      44            ;     FR0        |  Imeas_a    |   Imeas_b    |  Vdc_meas    |     
      45            ;
      46            ; Note: FR0 keeps the measured variables in Q15 before doing gain & offset.  
      47            ;
      48            ;================================================================================
      49                            .def        _F2407_ileg2_dcbus_drv_read
      50            ;================================================================================
      51                            .include ..\include\x240x.h
      52            ;================================================================================
      53            
      54      0001  __F2407_ileg2_dcbus_drv_read_framesize .set 0001h
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:42:11 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
f07ilvd2.asm                                                         PAGE    2

      55            ;================================================================================
      56 0000       _F2407_ileg2_dcbus_drv_read:
      57            
      58 0000 8aa0          POPD    *+                                                                             ; Keep return add
      59 0001 80a0          SAR     AR0,*+                                                                 ; Keep old frame pointer 
      60 0002 8180          SAR     AR1,*                                                                  ; Keep old stack pointer 
      61 0003 b001          LARK    AR0,__F2407_ileg2_dcbus_drv_read_framesize ; Load AR0 with frame size   
      62 0004 00e8          LAR     AR0,*0+,AR0                                                            ; AR0->FP0 (new FP), ARP=
      63            ;================================================================================
      64 0005 7c03                  SBRK    #3              ; ARP=AR0, AR0->FR0-3 (1st argument)            
      65            ;--------------------------------------------------------------------------------
      66 0006 0280                  LAR             AR2,*   ; ARP=AR0, AR0->Imeas_a_gain, AR2->Imeas_a_gain         
      67            ;--------------------------------------------------------------------------------
      68 0007 7803                  ADRK    #3              ; ARP=AR0, AR0->FR0, AR2->Imeas_a_gain 
      69            ;--------------------------------------------------------------------------------
      70 0008 8b8b                  MAR             *,AR3   ; ARP=AR0, AR0->FR0, AR2->Imeas_a_gain, ARP=AR3
      71            ;----------------------------------------------------------------------------------
      72 0009 be47          SETC    SXM             ; Turn sign extension mode on
      73                                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain
      74            ;----------------------------------------------------------------------------------
      75 000a be43                  SETC    OVM             ; Set overflow mode
      76                                                            ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain
      77            ;----------------------------------------------------------------------------------
      78 000b bf00                  SPM     0       ; Reset product mode
      79                                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain 
      80            ;----------------------------------------------------------------------------------
      81 000c bf0b          LAR     AR3,#ADCTRL2
         000d 70a1  
      82                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain, AR3->ADC_CNTL2 
      83            ;--------------------------------------------------------------------------------
      84 000e 4380  WAIT    BIT     *,BIT12 ; poll ADC Flag to wait for compl. of conv.
      85                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain, AR3->ADC_CNTL2 
      86            ;--------------------------------------------------------------------------------
      87 000f e100          BCND    WAIT,TC ; Loop on the ADC Flag for completion (check SEQ_BSY bit) 
         0010 000e' 
      88                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain, AR3->ADC_CNTL2 
      89            ;--------------------------------------------------------------------------------
      90 0011 7807          ADRK    #7      ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain, AR3->RESULT0
      91            ;--------------------------------------------------------------------------------
      92 0012 1088          LACC    *,AR0   ; ACC = ADC_RESULT0 (raw data)
      93                                    ; ARP=AR3, AR0->FR0, AR2->Imeas_a_gain, AR3->RESULT0, ARP=AR0
      94            ;--------------------------------------------------------------------------------
      95 0013 bfd0          XOR     #8000h  ; Convert result to Q15 (bipolar signal)
         0014 8000  
      96                                    ; ARP=AR0, AR0->FR0, AR2->Imeas_a_gain, AR3->RESULT0
      97            ;--------------------------------------------------------------------------------
      98 0015 9080          SACL    *       ; FR0 = Imeas_a  (Q15)
      99                                    ; ARP=AR0, AR0->FR0, AR2->Imeas_a_gain, AR3->RESULT0
     100            ;--------------------------------------------------------------------------------
     101 0016 738a          LT      *,AR2   ; TREG = Imeas_a  (Q15)
     102                                    ; ARP=AR0, AR0->FR0, AR2->Imeas_a_gain, AR3->RESULT0, ARP=AR2