📄 bldc3pwm.asm
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;============================================================================
; File Name: Bldc3pwm.asm
;
; Module Name: BLDC_3PWM_DRV
;
; Initialization Routine: BLDC_3PWM_DRV_INIT
;
; Originator: Digital Control Systems Group
; Texas Instruments
;
; Description: Controls switching state of Inverter driving a BLDC motor
;
; |~~~~~~~~~~~~~~~|
; cmtn_ptr_bdo----->| |----->o CMPR1 (EV register)
; D_func o------>| BLDC_3PWM_DRV |----->o CMPR2 (EV register)
; Mfunc_p o------>| |----->o CMPR3 (EV register)
; | |----->o T1PER (EV register)
; |_______________|
;
;
;
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000 Release Rev 1.0
;=============================================================================
;(To use this Module, copy this section to main system file)
; .ref BLDC_3PWM_DRV, BLDC_3PWM_DRV_INIT ;function call
; .ref cmtn_ptr_bd, D_func, Mfunc_p ;Inputs
; Note: CMPR1, CMPR2, CMPR3, T1PR are defined in .h file
;=============================================================================
;Module definitions for external reference.
.def BLDC_3PWM_DRV, BLDC_3PWM_DRV_INIT ;function call
.def cmtn_ptr_bd, D_func, Mfunc_p ;Inputs
;=============================================================================
.include x24x_app.h
ACTIVE_HI .set 1 ;Select ACTIVE_HI or ACTIVE_LO by setting
ACTIVE_LO .set 0 ;the corresponding parameter to 1. Set the other
;parameter to 0.
;This setting depends on Power devices. ACTIVE_HI implies the power device turns
;ON with a HIGH gate signal. ACTIVE_LO implies the power device turns
;ON with a LOW gate signal. This polarity definition is not the same as the PWM
;polarity(Active High/Active Low) defined by the ACTR
;register in x24x/x24xx. The setting chosen here is applicable only when ACTR
;is configured to generate Active High PWM.
;==============================================================================
;Variable Definitions for BLDC_PWM module
;------------------------------------------------------------------------------
;cmtn_ptr_bd .usect "bldc3pwm",1 ;Commutation pointer
;D_func .usect "bldc3pwm",1
;Mfunc_p .usect "bldc3pwm",1
;period_max .usect "bldc3pwm",1
;period .usect "bldc3pwm",1
;GPR0_BLDC_PWM .usect "bldc3pwm",1
bldc3pwm_vars .usect "bldc3pwm",6,1
cmtn_ptr_bd .set bldc3pwm_vars+0 ;Commutation pointer
D_func .set bldc3pwm_vars+1
Mfunc_p .set bldc3pwm_vars+2
period_max .set bldc3pwm_vars+3
period .set bldc3pwm_vars+4
GPR0_BLDC_PWM .set bldc3pwm_vars+5
;===============================================================================
BLDC_3PWM_DRV_INIT:
;===============================================================================
;---target dependancy-----------------------------------------------------------
.if (x240) ;target dependancy
FPERIOD .set 1000 ;1000 x 50nS = 50uS, i.e. 20KHz PWM
; Initialize Event Manager
;PWM Unit setting
ldp #Mfunc_p
SPLK #FPERIOD, period_max
SPLK #7FFFh, Mfunc_p
;Configure Full Compare registers
POINT_EV
; SPLK #FPERIOD, T1PER ;temporary init only
SPLK #FPERIOD, T1PER ;temporary init only
SPLK #0000h,ACTR
SPLK #0000001000000000b,COMCON ;Compare Cntl
SPLK #1000001000000000b,COMCON ;Compare Cntl
SPLK #1001000001000000b,T1CON ;Asym
SPLK #0000000000000000b,GPTCON
;||||!!!!||||!!!!
;5432109876543210
.endif
;-------------------------------------------------------------------------------
;---target dependancy-----------------------------------------------------------
.if (x243) ;target dependancy
FPERIOD .set 1000 ;1000 x 50nS = 50uS, i.e. 20KHz PWM
; Initialize Event Manager
;PWM Unit setting
ldp #Mfunc_p
SPLK #FPERIOD, period_max
SPLK #7FFFh, Mfunc_p
;Configure Full Compare registers
POINT_EV
; SPLK #FPERIOD, T1PER ;temporary init only
SPLK #FPERIOD, T1PER ;temporary init only
SPLK #0000h,ACTR
SPLK #0000001000000000b,COMCON ;Compare Cntl
SPLK #1000001000000000b,COMCON ;Compare Cntl
SPLK #1001000001000000b,T1CON ;Asym
SPLK #0000000000000000b,GPTCON
;||||!!!!||||!!!!
;5432109876543210
;Enable Primary function on CMP1-CMP6 PWM outputs
POINT_PF2 ;OCRA.6 - OCRA.11
LACC OCRA
OR #0000111111000000b
;||||!!!!||||!!!!
;5432109876543210
SACL OCRA
.endif
;--------------------------------------------------------------------------------
;---target dependancy------------------------------------------------------------
.if (x2407) ;target dependancy
FPERIOD .set 2000 ;2000 x 25nS = 50uS, i.e. 20KHz PWM
; Initialize Event Manager
;PWM Unit setting
ldp #Mfunc_p
SPLK #FPERIOD, period_max
SPLK #7FFFh, Mfunc_p
;Configure Full Compare registers
POINT_EV
; SPLK #FPERIOD, T1PER ;temporary init only
SPLK #FPERIOD, T1PER ;temporary init only
SPLK #0000h,ACTR
SPLK #0000001000000000b,COMCON ;Compare Cntl
SPLK #1000001000000000b,COMCON ;Compare Cntl
SPLK #1001000001000000b,T1CON ;Asym
SPLK #0000000000000000b,GPTCON
;||||!!!!||||!!!!
;5432109876543210
;Enable Primary function on CMP1-CMP6 PWM outputs
POINT_PF2 ;OCRA.6 - OCRA.11
LACC OCRA
OR #0000111111000000b
;||||!!!!||||!!!!
;5432109876543210
SACL OCRA
.endif
;--------------------------------------------------------------------------------
RET
;================================================================================
BLDC_3PWM_DRV:
;================================================================================
ldp #cmtn_ptr_bd
LACC #COMMUTATION_TBL
ADD cmtn_ptr_bd
TBLR GPR0_BLDC_PWM
LACC GPR0_BLDC_PWM
BACC
STATE_ANB ;Input current path: Phase A
POINT_EV ;Output Current Path Phase B
SPLK #00C2H,ACTR ;Non fed phase Phase C
B STATE_END
STATE_ANC ;Input current path: Phase A
POINT_EV ;Output Current Path Phase C
SPLK #0C02H,ACTR ;Non Fed Phase Phase B
B STATE_END
STATE_BNC ;Input current path: Phase B
POINT_EV ;Output Current Path: Phase C
SPLK #0C20H,ACTR ;Non fed phase Phase A
B STATE_END
STATE_BNA ;Input current path: Phase B
POINT_EV ;Output Current Path Phase A
SPLK #002CH,ACTR ;Non fed phase Phase C
B STATE_END
STATE_CNA ;Input current path: Phase C
POINT_EV ;Output Current Path Phase A
SPLK #020CH,ACTR ;Non Fed Phase phase B
B STATE_END
STATE_CNB ;Input current path: Phase C
POINT_EV ;Output Current Path: Phase B
SPLK #02C0H,ACTR ;Non Fed Phase: Phase A
STATE_END:
;Convert "Period" (Q15) modulation function to Q0
ldp #Mfunc_p
LT Mfunc_p
MPY period_max ;P = period x period_max
PAC
SACH period,1
;Convert "D_func" (Q15) duty modulation function to Q0
.if (ACTIVE_HI) ;target dependancy
LACC #7FFFh
SUB D_func
SACL GPR0_BLDC_PWM
.endif
.if (ACTIVE_LO) ;target dependancy
LACC D_func
SACL GPR0_BLDC_PWM
.endif
LT GPR0_BLDC_PWM
MPY period ; P = D_func x period
PAC
POINT_EV
SACH CMPR1,1
SACH CMPR2,1
SACH CMPR3,1
RET
;Commutation sequence jump table - used with BACC inst.
;----------------------------------------------------------------------------
COMMUTATION_TBL:
ANB .word STATE_ANB ;COMMUTATION_PTR = 0, de-energized phase = C
ANC .word STATE_ANC ;COMMUTATION_PTR = 1, de-energized phase = B
BNC .word STATE_BNC ;COMMUTATION_PTR = 2, de-energized phase = A
BNA .word STATE_BNA ;COMMUTATION_PTR = 3, de-energized phase = C
CNA .word STATE_CNA ;COMMUTATION_PTR = 4, de-energized phase = B
CNB .word STATE_CNB ;COMMUTATION_PTR = 5, de-energized phase = A
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