📄 adc4udrv.lst
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dspa -q -l -s -i../../../rtmon -i../../../sys/bldc3_2/asm -i..\..\..\rtmon -i..\..\..\sys\bldc3_2\asm -v2xx -iC:/ti/c2400/cgtools/include -g adc4udrv.asm adc4udrv.obj
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 20:34:16 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
adc4udrv.asm PAGE 1
1 ;===========================================================================
2 ; File Name: Adc4udrv.asm
3 ;
4 ; Module Name: ADC04U_DRV
5 ;
6 ; Initialization Routine: ADC04U_DRV_INIT
7 ;
8 ; Originator: Digital Control Systems Group
9 ; Texas Instruments
10 ;
11 ; Description: This module performs 4-channel AD conversion of unipolar signals.
12 ;
13 ; |~~~~~~~~~~~~~~~~~~|
14 ; A4_ch_sel o------>| |
15 ; C1_gain o------>|Q13 ADC04U_DRV |
16 ; C2_gain o------>|Q13 |
17 ; C3_gain o------>|Q13 Q15|----->o C1_out
18 ; C4_gain o------>|Q13 Q15|----->o C2_out
19 ; | Q15|----->o C3_out
20 ; | Q15|----->o C4_out
21 ; |__________________|
22 ;
23 ; Notes:
24 ; 1. This is a Unipolor driver, i.e. expects the
25 ; ADC input to be 0->Vcc with gnd referenced to 0v
26 ; 2. Cx_gain has range of -3.999999 --> +3.99999 (i.e. Q13)
27 ; 3. Cx_out has range 0 --> +0.99999 (i.e. Q15)
28 ; with:
29 ; 1.0 x (VrefHi - VrefLo) = +0.999999 (7FFFh)
30 ; 0.5 x (VrefHi - VrefLo) = +0.5 (3FFFh)
31 ; 0.0 x (VrefHi - VrefLo) = 0 (0000h)
32 ;
33 ; ADC_ch_sel HEX values vs Channels selected
34 ; _________________________________________________________________
35 ; | C4 select | C3 select | C2 select | C1 select |
36 ; -----------------------------------------------------------------
37 ;
38 ; For x240
39 ; C1/C3 select: 0,1,2...7 --> Ch0,1,2,...7
40 ; C2/C4 select: 0,1,2...7 --> Ch8,9,10,...15
41 ;
42 ; For x243
43 ; C1/C2/C3/C4 select: 0,1,2...7 --> Ch0,1,2,...7
44 ;
45 ; For x2407
46 ; C1/C2/C3/C4 select: 0,1,2...F --> Ch0,1,2,...15
47 ;
48 ;
49 ; Target dependency: x240/243/2407
50 ; To Select the target device see x24x_app.h file.
51 ;
52 ;=====================================================================================
53 ; History:
54 ;-------------------------------------------------------------------------------------
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 20:34:16 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
adc4udrv.asm PAGE 2
55 ; 9-15-2000 Release Rev 1.0
56 ;===========================================================================
57 ;(To use this Module, copy this section to main system file)
58 ; .ref ADC04U_DRV, ADC04U_DRV_INIT ;function call
59 ; .ref A4_ch_sel,C1_gain,C2_gain,C3_gain,C4_gain ;inputs
60 ; .ref C1_out, C2_out, C3_out, C4_out ;Outputs
61 ;===========================================================================
62 .def ADC04U_DRV, ADC04U_DRV_INIT ;function call
63 .def A4_ch_sel,C1_gain,C2_gain,C3_gain,C4_gain ;inputs
64 .def C1_out, C2_out, C3_out, C4_out ;Outputs
65 ;===========================================================================
66
67 .include x24x_app.h
68 .ref GPR0
69
70
71 ;Alias Variable declaration (to conserve .bss locations)
72 0000! MASK .set GPR0
73
74
75 0000 C1_gain .usect "adc4udrv",1
76 0001 C2_gain .usect "adc4udrv",1
77 0002 C3_gain .usect "adc4udrv",1
78 0003 C4_gain .usect "adc4udrv",1
79 0004 C1_out .usect "adc4udrv",1
80 0005 C2_out .usect "adc4udrv",1
81 0006 C3_out .usect "adc4udrv",1
82 0007 C4_out .usect "adc4udrv",1
83 0008 A4_ch_sel .usect "adc4udrv",1
84 0009 GPR0adc .usect "adc4udrv",1
85 000a GPR1adc .usect "adc4udrv",1
86 ;======================================================================
87 0000 ADC04U_DRV_INIT:
88 ;======================================================================
89
90 0000 bc00- LDP #A4_ch_sel
91 0001 ae00- SPLK #1FFFh, C1_gain ;Init with gain of 1
0002 1fff
92 0003 ae01- SPLK #1FFFh, C2_gain ;Init with gain of 1
0004 1fff
93 0005 ae02- SPLK #1FFFh, C3_gain ;Init with gain of 1
0006 1fff
94 0007 ae03- SPLK #1FFFh, C4_gain ;Init with gain of 1
0008 1fff
95
96
97 ;---target dependancy---------------
98 .if (x240|x243) ;target dependancy
99
100 POINT_PF1
101 ;5432109876543210
102 ;!!!!||||!!!!||||
103 ; SPLK #0000000000000011b, ADC_CNTL2 ;
104 SPLK #0000000000000010b, ADC_CNTL2 ;Prescaler=4(for x243),8(for x240)
TMS320C24xx COFF Assembler Version 7.02 Sun Apr 27 20:34:16 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
adc4udrv.asm PAGE 3
105 SPLK #1111100100010000b, ADC_CNTL1 ;
106
107 LDP #A4_ch_sel
108 SPLK #5432h, A4_ch_sel ;default to Ch 2,3,4,5
109 RET
110
111 .endif
112 ;-----------------------------------
113
114 ;---target dependancy---------------
115 .if (x2407) ;target dependancy
116
117 0009 bce1 LDP #ADCL_CNTL1>>7
118 000a ae38 SPLK #0, CALIBRATION ;Zero the Cal reg.
000b 0000
119 000c ae20 SPLK #0100000000000000b,ADCL_CNTL1 ;Reset entire Module
000d 4000
120 ; SPLK #0010000000010000b,ADCL_CNTL1 ;Acq = 2 x Clks
121 000e ae20 SPLK #0010000100010000b,ADCL_CNTL1 ;Acq = 4 x Clks
000f 2110
122 ; SPLK #0010001000010000b,ADCL_CNTL1 ;Acq = 6 x Clks
123 ; SPLK #0010001100010000b,ADCL_CNTL1 ;Acq = 8 x Clks
124 ;||||!!!!||||!!!! ;Cascaded mode
125 ;5432109876543210
126
127 0010 ae22 SPLK #3, MAXCONV ;Setup for 4 conversions
0011 0003
128
129
130 0012 bc00- LDP #A4_ch_sel
131 0013 ae08- SPLK #3210h, A4_ch_sel ;default to Ch 1,0,2,3
0014 3210
132 0015 ef00 RET
133
134 .endif
135 ;-----------------------------------
136
137
138 ;======================================================================================
139 0016 ADC04U_DRV:
140 ;======================================================================================
141 ;---target dependancy---------------
142 .if (x240|x243) ;target dependancy
143
144 SETC SXM ; Sign extension mode on
145 ;Read 1st converted value
146 POINT_PF1
147 LACC ADC_FIFO1
148
149 LDP #A4_ch_sel
150 SFR
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