trap_gen.asm

TI的digital motor control lib的源代码。了解TI的编程规范

;=====================================================================================
; File name:        TRAP_GEN.ASM                     
;                    
; Originator:	Digital Control Systems Group
;			Texas Instruments
;
; Description:   This module generates trapezoidal output of adjustable maximum, 
;               minimum and frequency.                         
; 
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 02-08-2001	Release	Rev 1.0
;================================================================================
; Applicability: F240,F241,C242,F243,F24xx.  (Peripheral Independent).
;================================================================================
; Routine Name: trapgen_calc 				  					    Type: C Callable
;  
;  C prototype : void trapgen_calc(struct TRAPGEN *p);
;
;        The struct object is defined in the header file "trap_gen.h" as follows:
;
; typedef struct {  int  trap_delay_cntr;  /* Variable: Delay counter (Q0) */
;				  int  trap_dly_max_tmp; /* Variable: Temp maximum delay input (Q0) */
;				  int  trap_timer;		/* Variable: Timer (Q15) */
;				  int  trap_max;		/* Input: Maximum input (Q15) */			
;		 	 	  int  trap_max_tmp;	/* Variable: Temp maximum input (Q15) */
;		 	 	  int  trap_dly_max;	/* Input: Maximum delay input (Q0) */
;				  int  trap_min; 		/* Input: Minimum input (Q15) */
;				  int  trap_min_tmp;	/* Variable: Temp mimimum input (Q15) */			
;				  int  trap_out_lo;		/* Variable: Trapezoidal output (Q31) */
;				  int  trap_out;		/* Output: Trapezoidal output (Q31) */
;		  	  	  int  (*calc)();	  	/* Pointer to calculation function */ 
;				 } TRAPGEN;	            
;
;	 		 
;        Frame Usage Details:
;     step   |      a      |      b       |      c       |     d     
;____________|_____________|______________|______________|_____________
;     AR0  	 |trap_8192inv |              | 			 |     
;     AR1  	 | trap_tmp1   |              | 			 |     
;
;================================================================================
                .def        _trapgen_calc
;================================================================================
__trapgen_calc_framesize .set 0002h
;================================================================================
_trapgen_calc:
 													; Assume now ARP=AR1
     	POPD	*+									; Keep return address
       	SAR  	AR0,*+								; Keep old frame pointer (FP)
       	SAR   	AR1,*								; Keep old stack pointer (SP)
       	LARK  	AR0,__trapgen_calc_framesize 		; Load AR0 with frame size	
       	LAR   	AR0,*0+,AR0							; AR0->FP0 (new FP), ARP=AR0

;================================================================================
		SBRK	#3		; ARP=AR0, AR0->FR0-3 (1st argument)		
;----------------------------------------------------------------------------------
		LAR		AR2,*	; ARP=AR0, AR0->trap_delay_cntr, AR2->trap_delay_cntr
;----------------------------------------------------------------------------------
		ADRK	#3		; ARP=AR0, AR0->FR0, AR2->trap_delay_cntr 
;----------------------------------------------------------------------------------
		SPLK	#4,*+	; FR0 = trap_8192inv = 1/8192 (Q15)
                        ; ARP=AR0, AR0->FR1, AR2->trap_delay_cntr 
;----------------------------------------------------------------------------------
		MAR		*,AR2  	; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr
;----------------------------------------------------------------------------------
		SETC 	SXM		; Turn sign extension mode on
						; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr
;----------------------------------------------------------------------------------
		SETC	OVM		; Set overflow mode
						; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr
;----------------------------------------------------------------------------------
 		SPM     0       ; Reset product mode
       					; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr 
;----------------------------------------------------------------------------------
		LACC	*		; ACC = trap_delay_cntr  (Q0)
						; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr  	
;----------------------------------------------------------------------------------
     	ADD		#1		; ACC = trap_delay_cntr + 1  (Q0)
     					; ARP=AR2, AR0->FR1, AR2->trap_delay_cntr
;----------------------------------------------------------------------------------
    	SACL	*+		; trap_delay_cntr = trap_delay_cntr + 1  (Q0)
    					; ARP=AR2, AR0->FR1, AR2->trap_dly_max_tmp   
;----------------------------------------------------------------------------------
    	SUB		*+		; ACC = trap_delay_cntr + 1 - trap_dly_max_tmp (Q0)
    					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
    	BCND	TRAP_EXIT,LT ; Branch to TRAP_EXIT if trap_delay_cntr < trap_dly_max_tmp
    					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		LACC	*		; ACC = trap_timer  (Q15)
						; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		ADD		#1		; ACC = trap_timer + 1  (Q15)
						; ARP=AR2, AR0->FR1, AR2->trap_timer		
;----------------------------------------------------------------------------------
      	AND		#7FFFh	; Force "wrap" around for positive Q15 number
      					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		SACL	*		; trap_timer = trap_timer + 1  (Q15)
					    ; ARP=AR2, AR0->FR1, AR2->trap_timer	 	
;----------------------------------------------------------------------------------
    	LACC	*		; ACC = trap_timer  (Q15)
    					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
    	BCND	SKIP_UPDATE_MAX, NEQ ; Branch to SKIP_UPDATE_MAX if trap_timer != 0
                       	; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		ADRK	#1		; ARP=AR2, AR0->FR1, AR2->trap_max
;----------------------------------------------------------------------------------
      	LACC	*+		; ACC = trap_max   (Q15)
      					; ARP=AR2, AR0->FR1, AR2->trap_max_tmp 
;----------------------------------------------------------------------------------
       	SACL	*+		; trap_max_tmp = trap_max   (Q15)
      					; ARP=AR2, AR0->FR1, AR2->trap_dly_max
;----------------------------------------------------------------------------------
		LACC	*		; ACC = trap_dly_max  (Q0)
						; ARP=AR2, AR0->FR1, AR2->trap_dly_max
;----------------------------------------------------------------------------------
       	SBRK	#4		; ARP=AR2, AR0->FR1, AR2->trap_dly_max_tmp
;----------------------------------------------------------------------------------
       	SACL	*+		; trap_dly_max_tmp = trap_dly_max  (Q0)
       					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
SKIP_UPDATE_MAX        	; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
  		LACC	*		; ACC = trap_timer  (Q15)
  						; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
 		SUB		#4000h	; ACC = trap_timer - 4000h (Q15)
  						; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		BCND	SKIP_UPDATE_MIN, NEQ ; Branch to SKIP_UPDATE_MIN if trap_timer != 0.50
                        ; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
       	ADRK	#4		; ARP=AR2, AR0->FR1, AR2->trap_min
;----------------------------------------------------------------------------------
		LACC	*+		; ACC = trap_min  (Q15)
						; ARP=AR2, AR0->FR1, AR2->trap_min_tmp	
;----------------------------------------------------------------------------------
       	SACL	*		; trap_min_tmp = trap_min  (Q15)
						; ARP=AR2, AR0->FR1, AR2->trap_min_tmp
;----------------------------------------------------------------------------------
     	SBRK	#5		; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
SKIP_UPDATE_MIN         ; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
     	LACC	*		; ACC = trap_timer  (Q15)
     					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
    	SUB		#2000h	; ACC = trap_timer - 2000h (Q15)
    					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
		BCND	INCREASE_TRAP,LT    ; Branch to INCREASE_TRAP if 0 < trap_timer < 0.25
		                ; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
       	LACC	*		; ACC = trap_timer  (Q15)
       					; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------
       	SUB		#4000h	; ACC = trap_timer - 4000h  (Q15)
       					; ARP=AR2, AR0->FR1, AR2->trap_timer 
;----------------------------------------------------------------------------------
		BCND	MAX_TRAP,LT			; Branch to MAX_TRAP if 0.25 < trap_timer < 0.5
                        ; ARP=AR2, AR0->FR1, AR2->trap_timer
;----------------------------------------------------------------------------------