📄 svgen_mf.asm
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; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
SUB *+ ; ACC=1-dy
; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
SUB *-,AR2 ; ACC=1-dy-dx
; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
SFR ; ACC=(1-dy-dx)/2.
; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
ADRK #1 ; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
SACL * ; store va.
; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
LACC #7fffh ; ACC=1.
; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
SUB *+ ; ACC=1-va.
; ARP=AR2. AR0->FR3 and AR2->vb
;--------------------------------------------------------------------------------
SACL *- ; store vb.
; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
LACC *,AR0 ; get va.
; ARP=AR0. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
ADD *+,AR2 ; ACC=va+dy.
; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
ADRK #2 ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
SACL * ; store vc
; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
B __SVGEN_gen_outputs
; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
__SVGEN_gen_outputs:
; on entry from all sector sub-routines,
; ARP=AR2. AR0->FR4 and AR2->vc
; post processing is as follows:
; V?=(V?-3fffh)*2*gain.
; ? => a, b, and c.
;--------------------------------------------------------------------------------
LACC * ; get vc.
; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
SUB #3fffh ; vc-3fffh
; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
SACL *- ; store vc-3fffh
; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
LACC * ; get vb.
; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
SUB #3fffh ; vb-3fffh
; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
SACL *- ; store vb-3fffh
; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
LACC * ; get va.
; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
SUB #3fffh ; va-3fffh
; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
SACL * ; store va-3fffh
; ARP=AR2. AR0->FR4 and AR2->(va-3fffh)
;--------------------------------------------------------------------------------
SBRK #5 ; ARP=AR2. AR0->FR4 and AR2->gain
;--------------------------------------------------------------------------------
LT * ; TREG=gain
; ARP=AR2. AR0->FR4 and AR2->gain
;--------------------------------------------------------------------------------
ADRK #5 ; ARP=AR2. AR0->FR4 and AR2->(va-3fffh)
;--------------------------------------------------------------------------------
MPY * ; P=gain*(va-3fffh).
; ARP=AR2. AR0->FR4 and AR2->(va-3fffh)
;--------------------------------------------------------------------------------
PAC ; ACC=gain*(va-3fffh)
; SPM=1 already, and removes extra sign bit.
; ARP=AR2. AR0->FR4 and AR2->(va-3fffh)
;--------------------------------------------------------------------------------
APAC ; ACC=2*gain*(va-3fffh)
; ARP=AR2. AR0->FR4 and AR2->(va-3fffh)
;--------------------------------------------------------------------------------
SACH *+ ; store 2*gain*(va-3fffh)=va_final_value,
; ARP=AR2. AR0->FR4 and AR2->(vb-3fffh)
;--------------------------------------------------------------------------------
MPY * ; P=gain*(vb-3fffh).
; ARP=AR2. AR0->FR4 and AR2->(vb-3fffh)
;--------------------------------------------------------------------------------
PAC ; ACC=gain*(vb-3fffh)
; SPM=1 already, and removes extra sign bit.
; ARP=AR2. AR0->FR4 and AR2->(vb-3fffh)
;--------------------------------------------------------------------------------
APAC ; ACC=2*gain*(vb-3fffh)
; ARP=AR2. AR0->FR4 and AR2->(vb-3fffh)
;--------------------------------------------------------------------------------
SACH *+ ; store 2*gain*(vb-3fffh)=vb_final_value,
; ARP=AR2. AR0->FR4 and AR2->(vc-3fffh)
;--------------------------------------------------------------------------------
MPY * ; P=gain*(vc-3fffh).
; ARP=AR2. AR0->FR4 and AR2->(vc-3fffh)
;--------------------------------------------------------------------------------
PAC ; ACC=gain*(vc-3fffh)
; SPM=1 already, and removes extra sign bit.
; ARP=AR2. AR0->FR4 and AR2->(vc-3fffh)
;--------------------------------------------------------------------------------
APAC ; ACC=2*gain*(vc-3fffh)
; ARP=AR2. AR0->FR4 and AR2->(vc-3fffh)
;--------------------------------------------------------------------------------
SACH *,AR1 ; store 2*gain*(vc-3fffh)=vc_final_value,
; ARP=AR1. AR0->FR4 and AR2->(vc-3fffh)
; Note: ARP=AR1 in prep for exit.
;================================================================================
__Space_Vector_Gen_exit:
SPM 0 ; restore compiler product mode setting.
SBRK #(__SVGEN_framesize+1)
LAR AR0,*-
PSHD *
RET
_SVGEN_SECTOR_TABLE:
.word __SVGEN_Sector1
.word __SVGEN_Sector2
.word __SVGEN_Sector3
.word __SVGEN_Sector4
.word __SVGEN_Sector5
.word __SVGEN_Sector6
;-------------------------------------------------------
;Sine table (0 - 60 deg) used for Space Vector Generator.
;No. Samples 256 Angle Range 60
;-------------------------------------------------------
; SINVAL ; Index Angle Sin(Angle)
_SINE_TABLE_60:
.word 0 ; 0 0 0.00
.word 134 ; 1 0.23 0.00
.word 268 ; 2 0.47 0.01
.word 402 ; 3 0.70 0.01
.word 536 ; 4 0.94 0.02
.word 670 ; 5 1.17 0.02
.word 804 ; 6 1.41 0.02
.word 938 ; 7 1.64 0.03
.word 1072 ; 8 1.88 0.03
.word 1206 ; 9 2.11 0.04
.word 1340 ; 10 2.34 0.04
.word 1474 ; 11 2.58 0.04
.word 1608 ; 12 2.81 0.05
.word 1742 ; 13 3.05 0.05
.word 1876 ; 14 3.28 0.06
.word 2009 ; 15 3.52 0.06
.word 2143 ; 16 3.75 0.07
.word 2277 ; 17 3.98 0.07
.word 2411 ; 18 4.22 0.07
.word 2544 ; 19 4.45 0.08
.word 2678 ; 20 4.69 0.08
.word 2811 ; 21 4.92 0.09
.word 2945 ; 22 5.16 0.09
.word 3078 ; 23 5.39 0.09
.word 3212 ; 24 5.63 0.10
.word 3345 ; 25 5.86 0.10
.word 3479 ; 26 6.09 0.11
.word 3612 ; 27 6.33 0.11
.word 3745 ; 28 6.56 0.11
.word 3878 ; 29 6.80 0.12
.word 4011 ; 30 7.03 0.12
.word 4144 ; 31 7.27 0.13
.word 4277 ; 32 7.50 0.13
.word 4410 ; 33 7.73 0.13
.word 4543 ; 34 7.97 0.14
.word 4675 ; 35 8.20 0.14
.word 4808 ; 36 8.44 0.15
.word 4941 ; 37 8.67 0.15
.word 5073 ; 38 8.91 0.15
.word 5205 ; 39 9.14 0.16
.word 5338 ; 40 9.38 0.16
.word 5470 ; 41 9.61 0.17
.word 5602 ; 42 9.84 0.17
.word 5734 ; 43 10.08 0.17
.word 5866 ; 44 10.31 0.18
.word 5998 ; 45 10.55 0.18
.word 6130 ; 46 10.78 0.19
.word 6261 ; 47 11.02 0.19
.word 6393 ; 48 11.25 0.20
.word 6524 ; 49 11.48 0.20
.word 6655 ; 50 11.72 0.20
.word 6787 ; 51 11.95 0.21
.word 6918 ; 52 12.19 0.21
.word 7049 ; 53 12.42 0.22
.word 7180 ; 54 12.66 0.22
.word 7310 ; 55 12.89 0.22
.word 7441 ; 56 13.13 0.23
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