svgen_mf.asm

TI的digital motor control lib的源代码。了解TI的编程规范

                BACC            ; go to the sector routine for present sector.
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
__SVGEN_Sector1:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr

                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-dy
                                ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *,AR2   ; ACC=1-dy-dx.
                                ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SFR             ; ACC=(1-dy-dx)/2.
                                ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                ADRK    #1      ; point AR2 to va
                                ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                SACL    *+,AR0  ; store va.
                                ; ARP=AR0. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
                ADD     *,AR2   ; ACC=va+dx
                                ; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
                SACL    *-      ; store vb.
                                ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                SUB     *       ; ACC=1-va
                                ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                SACL    *       ; store vc.
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                B      __SVGEN_gen_outputs
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------

__SVGEN_Sector2:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
                LACC    #7fffh
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-dy
                                ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *-,AR2  ; ACC=1-dy-dx
                                ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SFR             ; ACC=(1-dy-dx)/2.
                                ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR3 and AR2->vb
;--------------------------------------------------------------------------------
                SACL    *-,AR0  ; store vb
                                ; ARP=AR0. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
                ADD     *+,AR2  ; ACC=(vb+dy)=va
                                ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                SACL    *+      ; store va
                                ; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1
                                ; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-vb.
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                SACL    *       ; store Vc
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                B      __SVGEN_gen_outputs
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
__SVGEN_Sector3:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-dy
                                ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *,AR2   ; ACC=1-dy-dx.
                                ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SFR             ; ACC=(1-dy-dx)/2.
                                ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR4 and AR2->vb.
;--------------------------------------------------------------------------------
                SACL    *+,AR0  ; store vb
                                ; ARP=AR0. AR0->FR4 and AR2->vc.
;--------------------------------------------------------------------------------
                ADD     *,AR2   ; Acc=(bv+dx)
                                ; ARP=AR2. AR0->FR4 and AR2->vc.
;--------------------------------------------------------------------------------
                SACL    *-      ; store vc
                                ; ARP=AR2. AR0->FR4 and AR2->vb.
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR2. AR0->FR4 and AR2->vb.
;--------------------------------------------------------------------------------
                SUB     *-      ; ACC=1-vb
                                ; ARP=AR2. AR0->FR4 and AR2->va.
;--------------------------------------------------------------------------------
                SACL    *       ; store va.
                                ; ARP=AR2. AR0->FR4 and AR2->va.
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR4 and AR2->vc.
;--------------------------------------------------------------------------------
                B      __SVGEN_gen_outputs
                                ; ARP=AR2. AR0->FR4 and AR2->vc.

;--------------------------------------------------------------------------------
__SVGEN_Sector4:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr

                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-dy
                                ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *-,AR2  ; ACC=1-dy-dx
                                ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SFR             ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                ADRK    #3      ; ARP=AR2. AR0->FR3 and AR2->vc
;--------------------------------------------------------------------------------
                SACL    *-,AR0  ; store vc.
                                ; ARP=AR0. AR0->FR3 and AR2->vb
;--------------------------------------------------------------------------------
                ADD     *,AR2   ; ACC=(vc+dy)
                                ; ARP=AR2. AR0->FR3 and AR2->vb
;--------------------------------------------------------------------------------
                SACL    *+      ; store vb
                                ; ARP=AR2. AR0->FR3 and AR2->vc
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR2. AR0->FR3 and AR2->vc
;--------------------------------------------------------------------------------
                SUB     *       ; ACC=1-vc.
                                ; ARP=AR2. AR0->FR3 and AR2->vc
;--------------------------------------------------------------------------------
                SBRK    #2      ;
                                ; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
                SACL    *       ; store Va
                                ; ARP=AR2. AR0->FR3 and AR2->va
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR3 and AR2->vc
;--------------------------------------------------------------------------------
                B      __SVGEN_gen_outputs
;--------------------------------------------------------------------------------
__SVGEN_Sector5:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr


                LACC    #7fffh  ; ACC=1.
                                ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *+      ; ACC=1-dy
                                ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SUB     *,AR2  ; ACC=1-dy-dx
                                ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                SFR             ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                ADRK    #3      ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                SACL    *,AR0   ; store vc.
                                ; ARP=AR0. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                ADD     *,AR2   ; ACC=(vc+dx).
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                SBRK    #2      ; ARP=AR2. AR0->FR4 and AR2->va
;--------------------------------------------------------------------------------
                SACL    *       ; store Va
;--------------------------------------------------------------------------------
                ADRK    #2      ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                SUB     *-      ; ACC=1-vc
                                ; ARP=AR2. AR0->FR4 and AR2->vb
;--------------------------------------------------------------------------------
                SACL    *+      ; Store vb.
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
                B      __SVGEN_gen_outputs
                                ; ARP=AR2. AR0->FR4 and AR2->vc
;--------------------------------------------------------------------------------
__SVGEN_Sector6:                ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
;--------------------------------------------------------------------------------
                LACC    #7fffh  ; ACC=1