clark.lst

TI的digital motor control lib的源代码。了解TI的编程规范

C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs clark.asm -o ..\obj\clark.obj -l ..\temp\clark.lst 

TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:04 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
clark.asm                                                            PAGE    1

       1            ;=====================================================================================
       2            ; File name:        CLARK.ASM                     
       3            ;                    
       4            ; Originator:   Digital Control Systems Group
       5            ;                       Texas Instruments
       6            ;
       7            ; Description:                                 
       8            ; This file contains source for the CLARK transformation.
       9            ;=====================================================================================
      10            ; History:
      11            ;-------------------------------------------------------------------------------------
      12            ; 9-15-2000     Release Rev 1.0
      13            ;================================================================================
      14            ; Applicability: F240,F241,C242,F243,F24xx.  (Peripheral Independant).
      15            ; Description:        
      16            ;                                (a,b,c) -> (d,q) Transformation
      17            ;                                clark_d =  a
      18            ;                                clark_q = (2 *clark_b + clark_a) / sqrt(3)
      19            ;
      20            ;
      21            ;================================================================================
      22            ; Routine Name: Generic function.        Routine Type: C Callable
      23            ;
      24            ; Description:
      25            ;  
      26            ;  C prototype : int clark(void *in, void *out)
      27            ;================================================================================
      28                            .def        _clark
      29            ;================================================================================
      30            
      31      0001  __clark_framesize .set 0001h
      32            ;================================================================================
      33 0000       _clark:
      34 0000 8aa0                       POPD        *+
      35 0001 80a0                  SAR        AR0,*+
      36 0002 8180                  SAR        AR1,*
      37 0003 b001                  LARK        AR0,__clark_framesize
      38 0004 00e8                  LAR        AR0,*0+,AR0
      39            
      40            ;================================================================================
      41 0005 7c03                  SBRK        #3        ; Point AR0 to the first argument.
      42            ;--------------------------------------------------------------------------------
      43 0006 0290                  LAR        AR2,*-        ; get the argument #1 in AR2. 
      44                                            ; ARP=AR0, AR2->i/p s, AR0->arg #2. 
      45            ;--------------------------------------------------------------------------------
      46 0007 03a0                  LAR        AR3,*+        ; get the argument #1 in AR2. 
      47                                            ; ARP=AR0, AR0->arg #2, AR2->i/p's, AR3->o/p's.
      48            ;--------------------------------------------------------------------------------
      49 0008 7803                  ADRK    #3      ; Restore AR0 to point to FR0.
      50                                            ; ARP=AR0, AR0->FR0, AR2->i/p's, AR3->o/p's.
      51            ;--------------------------------------------------------------------------------
      52 0009 bf01                         SPM     1       ; Set SPM for Q15 multiplication
      53            ;--------------------------------------------------------------------------------
      54 000a be47                  SETC        SXM     ; Sign extension mode on
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:04 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
clark.asm                                                            PAGE    2

      55            ;--------------------------------------------------------------------------------
      56 000b 8b8a                  MAR     *,AR2   ; ARP=AR2, AR0->FR0, AR2->clark_a, AR3->clark_d
      57            ;--------------------------------------------------------------------------------
      58 000c 10ab                  LACC    *+,AR3  ; ACC= clark_a.
      59                                            ; ARP=AR3, AR0->FR0, AR2->clark_b, AR3->clark_d
      60            ;--------------------------------------------------------------------------------
      61 000d 90aa                  SACL    *+,AR2  ; Store Out_d=clark_a.
      62                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      63            ;--------------------------------------------------------------------------------
      64 000e be0a                  SFR             ; Acc=clark_a/2.
      65                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      66            ;--------------------------------------------------------------------------------
      67 000f 2088                  ADD     *,AR0   ; Acc=clark_a/2 + clark_b.
      68                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      69            ;--------------------------------------------------------------------------------
      70 0010 ae80                  SPLK         #18830,* ;FR0 = 1/sqrt(3).
         0011 498e  
      71                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      72            ;--------------------------------------------------------------------------------
      73 0012 7380                  LT      *       ; T= 1/sqrt(3).
      74                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      75            ;--------------------------------------------------------------------------------
      76 0013 9080                  SACL    *       ; FR0=clark_a/2 + clark_b.
      77                                            ; ARP=AR2, AR0->FR0, AR2->clark_b, AR3->clark_q
      78            ;--------------------------------------------------------------------------------
      79 0014 548b                  MPY     *,AR3   ; PREG = (clark_a/2 + clark_b)/sqrt(3).
      80                                            ; ARP=AR3, AR0->FR0, AR2->clark_b, AR3->clark_q
      81            ;--------------------------------------------------------------------------------
      82 0015 be03                  PAC             
      83 0016 be04                  APAC            ; ACC =  (clark_a + 2 * clark_b)/sqrt(3).
      84                                            ; ARP=AR3, AR0->FR0, AR2->clark_b, AR3->clark_q
      85            ;--------------------------------------------------------------------------------
      86 0017 9889                  SACH    *,AR1   ; Store clark_q.
      87                                            ; ARP=AR1, AR0->FR0, AR2->clark_b, AR3->clark_q
      88            ;--------------------------------------------------------------------------------
      89 0018 bf00                  SPM     0
      90            ;--------------------------------------------------------------------------------
      91 0019       __clark_exit:
      92 0019 7c02                  SBRK        #(__clark_framesize+1)
      93 001a 0090                  LAR        AR0,*-
      94 001b 7680                  PSHD        *
      95 001c ef00                  RET
      96            
      97            

 No Errors,  No Warnings