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📄 mul_q.lst

📁 TI的digital motor control lib的源代码。了解TI的编程规范
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs mul_q.asm -o ..\obj\mul_q.obj -l ..\temp\mul_q.lst 

TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:17 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
mul_q.asm                                                            PAGE    1

       1            ;=====================================================================================
       2            ; File name:        MUL_Q.ASM                     
       3            ;                    
       4            ; Originator:   Digital Control Systems Group
       5            ;                       Texas Instruments
       6            ;
       7            ; Description:                                 
       8            ; Multiplication of two numbers in arbitraty Q system
       9            ;=====================================================================================
      10            ; History:
      11            ;-------------------------------------------------------------------------------------
      12            ; 9-15-2000     Release Rev 1.0
      13            ;================================================================================
      14            ; Applicability: F240,F241,C242,F243,F24xx.  (Peripheral Independent).
      15            ;================================================================================
      16            ; Routine Name: Q Multiplication                     Routine Type: C Callable
      17            ;
      18            ;
      19            ;  C prototype : int mul_q(int NO_1, int Q_1, int NO_2, int Q_2, int Q_result);  
      20            ;
      21            ; where the NO_1 is the number in Q_1 system
      22            ;       the NO_2 is the number in Q_2 system    
      23            ;         the Q_result is the Q system for the result of NO_1*NO_2
      24            ;
      25            ; Note that Q_1 (or Q_2) could be higher than 15 (e.g., 16,...,31) for a 
      26            ; very low number of NO_1 (or NO_2). If that is the case, NO_1 (or NO_2) must be
      27            ; only the positive number.
      28            ; 
      29            ;================================================================================
      30            ;
      31            ;        Frame Usage Details:
      32            ;     step   |      a      |      b       |      c      |     d     
      33            ;____________|_____________|______________|_____________|_____________
      34            ;     FR0        | right_shift |    result    |             |     
      35            ;
      36            ;================================================================================
      37                            .def        _mul_q
      38            ;================================================================================
      39      0001  __mul_q_framesize       .set 0001h
      40            ;================================================================================
      41 0000       _mul_q:            
      42 0000 8aa0          POPD    *+                                                                      ; Keep return address
      43 0001 80a0          SAR     AR0,*+                                                          ; Keep old frame pointer (FP)
      44 0002 8180          SAR     AR1,*                                                           ; Keep old stack pointer (SP)
      45 0003 b001          LARK    AR0,__mul_q_framesize                           ; Load AR0 with frame size      
      46 0004 00e8          LAR     AR0,*0+,AR0                                                     ; AR0->FP0 (new FP), ARP=AR0
      47            ;================================================================================
      48 0005 7c03          SBRK    #3              ; ARP=AR0, AR0->FR0-3 (1st argument)    
      49            ;----------------------------------------------------------------------------------
      50 0006 be47                  SETC    SXM             ; Turn sign extension mode on
      51                                                            ; ARP=AR0, AR0->NO_1
      52            ;----------------------------------------------------------------------------------
      53 0007 be43                  SETC    OVM             ; Set overflow mode
      54                                                            ; ARP=AR0, AR0->NO_1
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:17 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
mul_q.asm                                                            PAGE    2

      55            ;----------------------------------------------------------------------------------
      56 0008 bf00                  SPM     0       ; Reset product mode
      57                                                    ; ARP=AR0, AR0->NO_1 
      58            ;----------------------------------------------------------------------------------
      59 0009 7390                  LT      *-              ; TREG = NO_1  (Q_1)
      60                                                            ; ARP=AR0, AR0->Q_1                     
      61            ;----------------------------------------------------------------------------------
      62 000a 1090                  LACC    *-              ; ACC = Q_1
      63                                                            ; ARP=AR0, AR0->NO_2
      64            ;----------------------------------------------------------------------------------
      65 000b 5490          MPY     *-      ; PREG = NO_1*NO_2 (Q_1+Q_2)
      66                                                    ; ARP=AR0, AR0->Q_2
      67            ;----------------------------------------------------------------------------------
      68 000c 2090                  ADD             *-              ; ACC = Q_1+Q_2
      69                                                    ; ARP=AR0, AR0->Q_result
      70            ;----------------------------------------------------------------------------------
      71 000d 3080          SUB             *               ; ACC = Q_1+Q_2-Q_result
      72                                                    ; ARP=AR0, AR0->Q_result
      73            ;----------------------------------------------------------------------------------
      74 000e ba01                  SUB             #1              ; ACC = Q_1+Q_2-Q_result-1 (minus 1 for RPT purpose)
      75                                    ; ARP=AR0, AR0->Q_result
      76            ;----------------------------------------------------------------------------------
      77 000f 7807          ADRK    #7              ; ARP=AR0, AR0->FR0
      78            ;----------------------------------------------------------------------------------
      79 0010 9080          SACL    *               ; FR0 = right_shift = Q_1+Q_2-Q_result-1
      80                                                    ; ARP=AR0, AR0->FR0             
      81            ;----------------------------------------------------------------------------------
      82 0011 be03          PAC                             ; ACC = NO_1*NO_2 (Q_1+Q_2)
      83                                    ; ARP=AR0, AR0->FR0
      84            ;----------------------------------------------------------------------------------
      85 0012 0b80                  RPT             *               ; Repeat right shift with Q_1+Q_2-Q_result times
      86                                    ; ARP=AR0, AR0->FR0
      87            ;----------------------------------------------------------------------------------
      88 0013 be0a          SFR                             ; ACC = NO_1*NO_2 (Q_result)
      89                                    ; ARP=AR0, AR0->FR0
      90            ;----------------------------------------------------------------------------------
      91 0014 9080                  SACL    *               ; FR0 = result = NO_1*NO_2 (Q_result)   
      92                                    ; ARP=AR0, AR0->FR0
      93            ;----------------------------------------------------------------------------------
      94 0015 6989                  LACL    *,AR1   ; ACC = result = NO_1*NO_2 (Q_result)
      95                                                            ; ARP=AR0, AR0->FR0, ARP=AR1            
      96            ;----------------------------------------------------------------------------------
      97 0016       _mul_q_exit:
      98                    ;MAR     *,AR1   ; can be removed if this condition is met on
      99                    ;                ; every path to this code. (i.e., ARP=AR1 here)
     100            
     101 0016 be42          CLRC    OVM
     102 0017 be46          CLRC    SXM
     103            
     104 0018 7c02          SBRK    #(__mul_q_framesize+1)
     105 0019 0090          LAR     AR0,*-
     106 001a 7680          PSHD    *
     107                    
     108 001b ef00          RET
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:17 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
mul_q.asm                                                            PAGE    3

     109                  

 No Errors,  No Warnings

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