📄 field_prof.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs field_prof.asm -o ..\obj\field_prof.obj -l ..\temp\field_prof.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:23 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
field_prof.asm PAGE 1
1 ;=====================================================================================
2 ; File name: FIELD_PROF.ASM
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ;
7 ; Description: This module generates the output command of rotating d-axis
8 ; stator current for a specific input command of speed reference
9 ; This is used for variable speed implementation of the vector
10 ; control of AC induction motor drives.
11 ;
12 ;=====================================================================================
13 ; History:
14 ;-------------------------------------------------------------------------------------
15 ; 02-08-2001 Release Rev 1.0
16 ;================================================================================
17 ; Applicability: F240,F241,C242,F243,F24xx. (Peripheral Independent).
18 ;================================================================================
19 ; Routine Name: field_profile_calc Type
20 ;
21 ; C prototype : void field_profile_calc(struct FIELDPROF *p);
22 ;
23 ; The struct object is defined in the header file "field_prof.h" as follows:
24 ;
25 ; typedef struct { int spd_ref_fp; /* Input: Reference speed (Q15) */
26 ; int spd_abs; /* Variable: Absolute reference speed (Q15) */
27 ; int spd_1; /* Parameter: Rated speed (Q15) */
28 ; int id_1; /* Parameter: Maximum value of d-axis stator cur
29 ; int id_ref_fp; /* Output: Reference d-axis stator current (Q15)
30 ; int (*calc)(); /* Pointer to calculation function */
31 ; } FIELDPROF;
32 ;
33 ;
34 ; Frame Usage Details:
35 ; step | a | b | c | d
36 ;____________|_____________|______________|______________|_____________
37 ; AR0 | field_tmp1 | | |
38 ;
39 ;================================================================================
40 .def _field_profile_calc
41 ;================================================================================
42 0001 __field_profile_calc_framesize .set 0001h
43 ;================================================================================
44 0000 _field_profile_calc:
45 ; Assume
46 0000 8aa0 POPD *+ ; Keep return address
47 0001 80a0 SAR AR0,*+ ; Keep old frame pointer (FP)
48 0002 8180 SAR AR1,* ; Keep old stack pointer (SP)
49 0003 b001 LARK AR0,__field_profile_calc_framesize ; Load AR0 with frame size
50 0004 00e8 LAR AR0,*0+,AR0 ; AR0->FP0 (new FP), ARP=AR0
51
52 ;================================================================================
53 0005 7c03 SBRK #3 ; ARP=AR0, AR0->FR0-3 (1st argument)
54 ;----------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:23 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
field_prof.asm PAGE 2
55 0006 0280 LAR AR2,* ; ARP=AR0, AR0->spd_ref_fp, AR2->spd_ref_fp
56 ;----------------------------------------------------------------------------------
57 0007 7803 ADRK #3 ; ARP=AR0, AR0->FR0, AR2->spd_ref_fp
58 ;----------------------------------------------------------------------------------
59 0008 8b8a MAR *,AR2 ; ARP=AR2, AR0->FR0, AR2->spd_ref_fp
60 ;----------------------------------------------------------------------------------
61 0009 be47 SETC SXM ; Turn sign extension mode on
62 ; ARP=AR2, AR0->FR0, AR2->spd_ref_fp
63 ;----------------------------------------------------------------------------------
64 000a be43 SETC OVM ; Set overflow mode
65 ; ARP=AR2, AR0->FR0, AR2->spd_ref_fp
66 ;----------------------------------------------------------------------------------
67 000b bf00 SPM 0 ; Reset product mode
68 ; ARP=AR2, AR0->FR0, AR2->spd_ref_fp
69 ;----------------------------------------------------------------------------------
70 000c 10a0 LACC *+ ; ACC = spd_ref_fp (Q15)
71 ; ARP=AR2, AR0->FR0, AR2->spd_abs
72 ;----------------------------------------------------------------------------------
73 000d be00 ABS ; ACC = |spd_ref_fp| (Q15)
74 ; ARP=AR2, AR0->FR0, AR2->spd_abs
75 ;----------------------------------------------------------------------------------
76 000e 90a0 SACL *+ ; spd_abs = |spd_ref_fp| (Q15)
77 ; ARP=AR2, AR0->FR0, AR2->spd_1
78 ;----------------------------------------------------------------------------------
79 000f 30a0 SUB *+ ; ACC = |spd_ref_fp| - spd_1 (Q15)
80 ; ARP=AR2, AR0->FR0, AR2->id_1
81 ;----------------------------------------------------------------------------------
82 0010 e344 BCND FIELD_PROF1,LT ; Branch to FIELD_PROF1 if |spd_ref_fp| < spd_1
0011 0014'
83 ; ARP=AR2, AR0->FR0, AR2->id_1
84 ;----------------------------------------------------------------------------------
85 0012 7980 B FIELD_PROF2 ; Branch to FIELD_PROF2 if |spd_ref_fp| >= spd_1
0013 0018'
86 ; ARP=AR2, AR0->FR0, AR2->id_1
87 ;----------------------------------------------------------------------------------
88 0014 FIELD_PROF1 ; ARP=AR2, AR0->FR0, AR2->id_1
89 ;----------------------------------------------------------------------------------
90 0014 10a0 LACC *+ ; ACC = id_1 (Q15)
91 ; ARP=AR2, AR0->FR0, AR2->id_ref_fp
92 ;----------------------------------------------------------------------------------
93 0015 9089 SACL *,AR1 ; id_ref_fp = id_1 (Q15)
94 ; ARP=AR2, AR0->FR0, AR2->id_ref_fp, ARP=AR1
95 ;----------------------------------------------------------------------------------
96 0016 7980 B FIELD_END ; ARP=AR2, AR0->FR0, AR2->id_ref_fp
0017 0021'
97 ;----------------------------------------------------------------------------------
98 0018 FIELD_PROF2 ; ARP=AR2, AR0->FR0, AR2->id_1
99 ;----------------------------------------------------------------------------------
100 0018 7390 LT *- ; TREG = id_1 (Q15)
101 ; ARP=AR2, AR0->FR0, AR2->spd_1
102 ;----------------------------------------------------------------------------------
103 0019 5498 MPY *-,AR0 ; PREG = id_1*spd_1 (Q30)
104 ; ARP=AR2, AR0->FR0, AR2->spd_abs, ARP=AR0
105 ;----------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:23 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
field_prof.asm PAGE 3
106 001a be03 PAC ; ACC = id_1*spd_1 (Q30)
107 ; ARP=AR0, AR0->FR0, AR2->spd_abs
108 ;----------------------------------------------------------------------------------
109 001b 9980 SACH *,1 ; field_tmp1 = id_1*spd_1 (Q15)
110 ; ARP=AR0, AR0->FR0, AR2->spd_abs
111 ;----------------------------------------------------------------------------------
112 001c 1f8a LACC *,15,AR2 ; ACC = id_1*spd_1 left shifted by 15 (id_ref_fp=Q15)
113 ; ARP=AR0, AR0->FR0, AR2->spd_abs, ARP=AR2
114 ;----------------------------------------------------------------------------------
115 001d bb0f RPT #15 ; Repeat SUBC 16 times
116 ; ARP=AR2, AR0->FR0, AR2->spd_abs
117 ;----------------------------------------------------------------------------------
118 001e 0a80 SUBC * ; Dividing (id_1*spd_1)/|spd_ref_fp|
119 ; ARP=AR2, AR0->FR0, AR2->spd_abs
120 ;----------------------------------------------------------------------------------
121 001f 7803 ADRK #3 ; ARP=AR2, AR0->FR0, AR2->id_ref_fp
122 ;----------------------------------------------------------------------------------
123 0020 9089 SACL *,AR1 ; id_ref_fp = (id_1*spd_1)/|spd_ref_fp| (Q15)\
124 ; ARP=AR2, AR0->FR0, AR2->id_ref_fp, ARP=AR1
125 ;----------------------------------------------------------------------------------
126 0021 FIELD_END
127 ;----------------------------------------------------------------------------------
128 0021 _field_profile_calc_exit:
129 ;; MAR *,AR1 ; can be removed if this condition is met on
130 ; every path to this code. (i.e., ARP=AR1 here)
131
132 0021 be42 CLRC OVM
133 0022 be46 CLRC SXM
134
135 0023 7c02 SBRK #(__field_profile_calc_framesize+1)
136 0024 0090 LAR AR0,*-
137 0025 7680 PSHD *
138
139 0026 ef00 RET
140
141
142
No Errors, No Warnings
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