sincosph.lst

TI的digital motor control lib的源代码。了解TI的编程规范

     101                                                    ; ARP=AR2, AR0->FR0, AR2->ALPHA_a1, ARP=AR0     
     102            ;----------------------------------------------------------------------------------
     103 0017 208a          ADD     *,AR2   ; ACC = ALPHA_a1 + STEP_ANGLE2
     104                                                    ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1, ARP=AR2
     105            ;----------------------------------------------------------------------------------
     106 0018 9080                  SACL    *               ; ALPHA_a1 = ALPHA_a1 + STEP_ANGLE2
     107                                                            ; ARP=AR2, AR0->FR0, AR2->ALPHA_a1      
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:16 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
sincosph.asm                                                         PAGE    3

     108            ;----------------------------------------------------------------------------------
     109 0019 18a8          LACC    *+,8,AR0 ; ACC high = ALPHA_a1/256
     110                                                    ; ARP=AR2, AR0->FR0, AR2->sine_a1, ARP=AR0
     111            ;----------------------------------------------------------------------------------
     112 001a 9880                  SACH    *               ; FR0 = ENTRY13
     113                                                            ; ARP=AR0, AR0->FR0, AR2->sine_a1
     114            ;----------------------------------------------------------------------------------
     115 001b bf80                  LACC    #SINTAB_360 ; ACC = #SINTAB_360
         001c 0000! 
     116                                                            ; ARP=AR0, AR0->FR0, AR2->sine_a1       
     117            ;----------------------------------------------------------------------------------
     118 001d 20aa          ADD             *+,AR2  ; ACC = #SINTAB_360 + ENTRY13
     119                                                    ; ARP=AR0, AR0->FR1, AR2->sine_a1, ARP=AR2
     120            ;----------------------------------------------------------------------------------
     121 001e a680                  TBLR    *               ; sine_a1 = sin(ALPHA_a1)  (Q15)
     122                                                            ; ARP=AR2, AR0->FR1, AR2->sine_a1                       
     123            ;----------------------------------------------------------------------------------
     124 001f 7380                  LT              *               ; TREG = sine_a1  (Q15)
     125                                                            ; ARP=AR2, AR0->FR1, AR2->sine_a1               
     126            ;----------------------------------------------------------------------------------
     127 0020 7c03                  SBRK    #3              ; ARP=AR2, AR0->FR1, AR2->gain_cs
     128            ;----------------------------------------------------------------------------------
     129 0021 5480                  MPY             *               ; PREG = sine_a1*gain_cs (Q30)
     130                                                            ; ARP=AR2, AR0->FR1, AR2->gain_cs
     131            ;----------------------------------------------------------------------------------
     132 0022 be03                  PAC                             ; ACC = sine_a1*gain_cs (Q30)
     133                                                            ; ARP=AR2, AR0->FR1, AR2->gain_cs
     134            ;----------------------------------------------------------------------------------
     135 0023 7803                  ADRK    #3              ; ARP=AR2, AR0->FR1, AR2->sine_a1       
     136            ;----------------------------------------------------------------------------------
     137 0024 9990                  SACH    *-,1    ; sine_a1 = sine_a1*gain_cs (Q15)
     138                                                            ; ARP=AR2, AR0->FR1, AR2->ALPHA_a1      
     139            ;----------------------------------------------------------------------------------
     140 0025       SG_a2                                   ; ARP=AR2, AR0->FR1, AR2->ALPHA_a1
     141            ;----------------------------------------------------------------------------------
     142 0025 1088                  LACC    *,AR0   ; ACC = ALPHA_a1
     143                                                            ; ARP=AR2, AR0->FR1, AR2->ALPHA_a1, ARP=AR0
     144            ;----------------------------------------------------------------------------------
     145 0026 2090          ADD             *-      ; ACC = ALPHA_a1 + phase (FR1)
     146                                                    ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1
     147            ;----------------------------------------------------------------------------------
     148 0027 9080                  SACL    *               ; FR0 = GPRC = ALPHA_a1 + phase
     149                                                            ; ARP=AR, AR0->FR0, AR2->ALPHA_a1       
     150            ;----------------------------------------------------------------------------------
     151 0028 1880                  LACC    *,8             ; ACC = GPRC = ALPHA_a1 + phase
     152                                                            ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1
     153            ;----------------------------------------------------------------------------------
     154 0029 9880                  SACH    *               ; FR0 = ENTRY13
     155                                                            ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1
     156            ;----------------------------------------------------------------------------------
     157 002a bf80                  LACC    #SINTAB_360 ; ACC = #SINTAB_360
         002b 0000! 
     158                                                            ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1      
     159            ;----------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:16 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
sincosph.asm                                                         PAGE    4

     160 002c 208a                  ADD             *,AR2   ; ACC = #SINTAB_360 + ENTRY13
     161                                                            ; ARP=AR0, AR0->FR0, AR2->ALPHA_a1, ARP=AR2
     162            ;----------------------------------------------------------------------------------
     163 002d 7802                  ADRK    #2              ; ARP=AR2, AR0->FR0, AR2->sine_a2
     164            ;----------------------------------------------------------------------------------
     165 002e a680                  TBLR    *               ; sine_a2 = sin(ALPHA_a1+phase)  (Q15)
     166                                                            ; ARP=AR2, AR0->FR0, AR2->sine_a2
     167            ;----------------------------------------------------------------------------------
     168 002f 7380                  LT              *               ; TREG = sine_a2 (Q15)
     169                                                            ; ARP=AR2, AR0->FR0, AR2->sine_a2
     170            ;----------------------------------------------------------------------------------
     171 0030 7c04                  SBRK    #4              ; ARP=AR2, AR0->FR0, AR2->gain_cs
     172            ;----------------------------------------------------------------------------------
     173 0031 5480                  MPY             *               ; PREG = sine_a2*gain_cs  (Q30)
     174                                                            ; ARP=AR2, AR0->FR0, AR2->gain_cs 
     175            ;----------------------------------------------------------------------------------
     176 0032 be03                  PAC                             ; ACC = sine_a2*gain_cs  (Q30)
     177                                                            ; ARP=AR2, AR0->FR0, AR2->gain_cs 
     178            ;----------------------------------------------------------------------------------
     179 0033 7804                  ADRK    #4              ; ARP=AR2, AR0->FR0, AR2->sine_a2
     180            ;----------------------------------------------------------------------------------
     181 0034 9989                  SACH    *,1,AR1 ; sine_a2 = sine_a2*gain_cs  (Q15)
     182                                                            ; ARP=AR2, AR0->FR0, AR2->sine_a2, ARP=AR1
     183            ;----------------------------------------------------------------------------------
     184 0035       _sincosph_calc_exit:
     185                   ;;       MAR     *,AR1   ; can be removed if this condition is met on
     186                                    ; every path to this code. (i.e., ARP=AR1 here)
     187            
     188 0035 be42          CLRC    OVM
     189            
     190 0036 7c03          SBRK    #(__sincosph_calc_framesize+1)
     191 0037 0090          LAR     AR0,*-
     192 0038 7680          PSHD    *
     193                    
     194 0039 ef00          RET
     195            
     196            
     197            

 No Errors,  No Warnings