box_car.lst

TI的digital motor control lib的源代码。了解TI的编程规范

      84            ;----------------------------------------------------------------------------------
      85 0011 69aa                  LACL    *+,AR2  ; ACC = BC_IN  (Q15)
      86                                                ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR, ARP=AR2
      87            ;----------------------------------------------------------------------------------
      88 0012 908b                  SACL    *,AR3   ; BC_BUFFER[BC_PTR] = BC_IN  (Q15)
      89                                                            ; ARP=AR2, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR, ARP=
      90            ;----------------------------------------------------------------------------------
      91 0013 6980          LACL    *               ; ACC = BC_PTR
      92                                                    ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
      93            ;----------------------------------------------------------------------------------
      94 0014 b801          ADD             #0001h  ; ACC = BC_PTR + 1
      95                                                    ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
      96            ;----------------------------------------------------------------------------------
      97 0015 bfb0          AND             #003Fh  ; ACC = BC_PTR + 1
         0016 003f  
      98                                                    ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
      99            ;----------------------------------------------------------------------------------
     100 0017 9080          SACL    *               ; BC_PTR = BC_PTR + 1
     101                                                    ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
     102            ;----------------------------------------------------------------------------------
     103 0018 b900          LACL    #0000h  ; ACC = 0  (Q15)
     104                                                    ; ARP=AR3, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
     105            ;----------------------------------------------------------------------------------
     106 0019 8b8a          MAR             *,AR2   ; ARP=AR2, AR0=BC_PTR, AR2->BC_BUFFER[BC_PTR], AR3->BC_PTR
     107            ;----------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:15 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
box_car.asm                                                          PAGE    3

     108 001a 8bda                  MAR             *0-,AR2 ; ARP=AR2, AR0=BC_PTR, AR2->BC_BUFFER[0], AR3->BC_PTR
     109            ;----------------------------------------------------------------------------------
     110 001b bb3f          RPT             #(BC_SIZE_-1) ; Repeat next instruction 64 times (BC_SIZE_ = 64)
     111                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_BUFFER[0], AR3->BC_PTR
     112            ;----------------------------------------------------------------------------------
     113 001c 20a0                  ADD             *+              ; ACC = sum of BC_BUFFER[0...63]  
     114                                                            ; ARP=AR2, AR0=BC_PTR, AR2->BC_BUFFER[0...63], AR3->BC_PTR      
     115            ;----------------------------------------------------------------------------------
     116                                                    ; **** # of SFR's is log2(BC_SIZE_) ****
     117 001d be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/2
     118                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR 
     119            ;----------------------------------------------------------------------------------
     120 001e be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/4
     121                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     122            ;----------------------------------------------------------------------------------
     123 001f be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/8
     124                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     125            ;----------------------------------------------------------------------------------
     126 0020 be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/16
     127                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     128            ;----------------------------------------------------------------------------------
     129 0021 be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/32
     130                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     131            ;----------------------------------------------------------------------------------
     132 0022 be0a          SFR                             ; ACC = sum of BC_BUFFER[0...63]/64
     133                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     134            ;----------------------------------------------------------------------------------
     135 0023 9080                  SACL    *               ; BC_OUT = sum of BC_BUFFER[0...63]/64
     136                                                            ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR 
     137            ;----------------------------------------------------------------------------------
     138 0024 73a0          LT              *+              ; TREG = BC_OUT  (Q15)
     139                                                    ; ARP=AR2, AR0=BC_PTR, AR2->bc_scaler, AR3->BC_PTR
     140            ;----------------------------------------------------------------------------------
     141 0025 5490          MPY             *-              ; PREG = BC_OUT*bc_scaler  (Q30)
     142                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR 
     143            ;----------------------------------------------------------------------------------
     144 0026 be03          PAC                             ; ACC = BC_OUT*bc_scaler  (Q30)
     145                                                    ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR
     146            ;----------------------------------------------------------------------------------
     147 0027 9989                  SACH    *,1,AR1 ; BC_OUT = BC_OUT*bc_scaler  (Q31)
     148                                                            ; ARP=AR2, AR0=BC_PTR, AR2->BC_OUT, AR3->BC_PTR, ARP=AR1
     149            ;----------------------------------------------------------------------------------
     150 0028       _bc_calc_exit:
     151                    ;; MAR     *,AR1   ; can be removed if this condition is met on
     152                                    ; every path to this code. (i.e., ARP=AR1 here)
     153            
     154 0028 be42          CLRC    OVM
     155 0029 be46          CLRC    SXM
     156            
     157 002a 7c01          SBRK    #(__bc_calc_framesize +1)
     158 002b 0090          LAR     AR0,*-
     159 002c 7680          PSHD    *
     160                    
     161 002d ef00          RET
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Tue May  6 12:41:15 2003
Copyright (c) 1987-1999  Texas Instruments Incorporated 
box_car.asm                                                          PAGE    4

     162            
     163            
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 No Errors,  No Warnings