📄 pid_reg2.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs pid_reg2.asm -o ..\obj\pid_reg2.obj -l ..\temp\pid_reg2.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:19 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
pid_reg2.asm PAGE 1
1 ;=====================================================================================
2 ; File name: pid_reg2.asm
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ;
7 ; Description:
8 ; PID Controller with anti-windup
9 ;
10 ;=====================================================================================
11 ; History:
12 ;-------------------------------------------------------------------------------------
13 ; 9-15-2000 Release Rev 1.0
14 ;================================================================================
15 ; Applicability: F240,F241,C242,F243,F24xx. (Peripheral Independant).
16 ;
17 ;
18 ;================================================================================
19 ; Routine Name: pid2_calc Routine Type: C Callable
20 ;
21 ; Description:
22 ;
23 ; C prototype : void pid2_calc(PID2 *p)
24 ;================================================================================
25 ; History Created July 18,2000
26 ;
27 ; Definition of PID2:
28 ;
29 ; typedef struct PID2 {
30 ;
31 ; int fb_reg2; /* Feedback signal for PI regulator Q15 Input */
32 ; int ref_reg2; /* Reference signal for PI regulator Q15 Input */
33 ; int k0_reg2; /* PI parameter - proportional gain Q9 */
34 ; int k1_reg2; /* PI parameter - integral time * sample time Q13 */
35 ; int kc_reg2; /* PI parameter - sampling time / integral time Q13 */
36 ; int un_reg2; /* Integral component of PI Q15 */
37 ; int en0_reg2; /* refrence signal - feedback signal Q15 */
38 ; int upi_reg2; /* actual PI output without taking into account saturation Q15 */
39 ; /* i.e. if output is not saturated out_reg2 = upi_reg2 */
40 ; int epi_reg2; /* out_reg2 - upi_reg2 Q15 */
41 ; int max_reg2; /* PI parameter - upper cut off saturation limit of PI regulator output Q15 */
42 ; int min_reg2; /* PI parameter - lower cut off saturation limit of PI regulator output Q15 */
43 ; int out_reg2; /* final PI regulator output Q15 */
44 ;
45 ; int (*calc)(); /* Pointer to the calculation function */
46 ;
47 ; } ;
48 ;
49 ;================================================================================
50
51 .def _pid2_calc
52 ;================================================================================
53 0000 _pid2_calc:
54
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:19 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
pid_reg2.asm PAGE 2
55 0001 __PID2_framesize .set 0001h
56 ;================================================================================
57 ; AR0 is the frame pointer, AR1 is the stack
58 ; pointer
59 ; ARP = AR1
60
61 0000 8aa0 POPD *+ ; Save the return address from hardware
62 ; stack onto the software stack
63 ; ARP = AR1
64
65 0001 80a0 SAR AR0, *+ ; push AR0 (FP). ARP = AR1
66 0002 8180 SAR AR1, * ; *SP = SP. ARP = AR1
67 0003 b001 LAR AR0, #__PID2_framesize ; FP = size of frame. ARP = AR1
68 ;--------------------------------------------------------------------------------
69 0004 bf00 SPM 0 ; set product mode to shift left zero bit
70 ;================================================================================
71 0005 00eb LAR AR0, *0+, AR3
72 ; allocate frame.
73 ; AR0 = *AR1
74 ; AR1 = AR1 + AR0
75 ; ARP = AR3
76 ;--------------------------------------------------------------------------------
77 0006 bf0b LAR AR3, #-3 ; AR3 = -3
0007 fffd
78 ; ARP = AR3.
79 ;--------------------------------------------------------------------------------
80 0008 8be0 MAR *0+ ; AR3 = AR0 - 3
81 ; ARP = AR3
82 ; AR3 -> Passed parameter
83 ; (i.e. pointer to structure)
84 ;--------------------------------------------------------------------------------
85 0009 0380 LAR AR3, * ; AR3 points to the first structure member
86 ; i.e. AR3 -> fb_reg2
87 ; ARP = AR3
88 ;--------------------------------------------------------------------------------
89 000a 8ba0 MAR *+ ; AR3 points to the second structure member i.e.
90 ; ref_reg2
91 ; ARP = AR3. AR3-> ref_reg2.
92 ;--------------------------------------------------------------------------------
93 000b 1090 LACC *- ; Accumulator = ref_reg2
94 ; ARP = AR3
95 ; AR3 -> fb_reg2
96 ;--------------------------------------------------------------------------------
97 000c 3080 SUB * ; Accumulator = ref_reg2[Q15] - fb_reg2[Q15]
98 ; ARP = AR3. AR3 -> fb_reg2
99 ;--------------------------------------------------------------------------------
100 000d 7806 ADRK #6 ; AR3 -> en0_reg2
101 ; ARP = AR3.
102 ;--------------------------------------------------------------------------------
103 000e 9090 SACL *- ; en0_reg2[Q15] = ref_reg2[Q15] - fb_reg2[Q15]
104 ; AR3 -> un_reg2
105 ; ARP = AR3.
106 ;--------------------------------------------------------------------------------
107 000f 19a0 LACC *+, 9 ; ACC[Q24] = (un_reg2[Q15] << 9)[Q24].
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:19 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
pid_reg2.asm PAGE 3
108 ; AR3 -> en0_reg2
109 ; ARP = AR3.
110 ;--------------------------------------------------------------------------------
111 0010 7380 LT * ; TREG = en0_reg2[Q15]
112 ; ARP = AR3. AR3 -> en0_reg2
113 ;--------------------------------------------------------------------------------
114 0011 7c04 SBRK #4 ; AR3 -> k0_reg2[Q9]
115 ; ARP = AR3
116 ;--------------------------------------------------------------------------------
117 0012 5480 MPY * ; PREG[Q24] = k0_reg2[Q9] * en0_reg2[Q15]
118 ; ARP = AR3.
119 ; AR3 -> k0_reg2[Q9]
120 ;--------------------------------------------------------------------------------
121 0013 be04 APAC ; ACC[Q24] = ACC[Q24] + shifted PREG[Q24].
122 ; Here shifting is by 0 bits since SPM = 0
123 ; ACC[Q24] = k0_reg2[Q9] * en0_reg2[Q15] +
124 ; (un_reg2[Q15] << 9)[Q24]
125 ; ARP = AR3.
126 ; AR3 -> k0_reg2[Q9]
127 ;--------------------------------------------------------------------------------
128 0014 bb06 RPT #6
129 0015 a080 NORM * ; ACC[Q31]. AR3 -> k0_reg2[Q9]
130 0016 8b00 NOP ; ARP = AR3.
131 0017 8b00 NOP ; NOP is used to avoid "pipe line conflict"
132 ;--------------------------------------------------------------------------------
133 0018 7805 ADRK #5 ; AR3 -> upi_reg2
134 ; ARP = AR3.
135 ;--------------------------------------------------------------------------------
136 0019 9880 SACH * ; upi_reg2[Q15] = (Higher order 16 bits of
137 ; ACC[Q31])[Q15]
138 ; AR3 -> upi_reg2
139 ; ARP = AR3.
140 ;--------------------------------------------------------------------------------
141 001a 1080 LACC * ; ACC[Q15] = upi_reg2[Q15]
142 ; AR3 -> upi_reg2
143 ; ARP = AR3.
144 ;--------------------------------------------------------------------------------
145 001b 7803 ADRK #3 ; AR3 -> min_reg2
146 ; ARP = AR3.
147 ;--------------------------------------------------------------------------------
148 001c 2080 ADD * ; ACC = upi_reg2 + min_reg2
149 ; ARP = AR3. AR3 -> min_reg2
150 ;--------------------------------------------------------------------------------
151 001d e344 BCND __PID2_Sat_Minus_Io, LT
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