📄 svgen_mf.lst
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146 0027 7c02 SBRK #2 ; point AR0 back to FR2 (entry_new).
147 ; ARP=AR0. AR0->FR2 and AR2->sector_ptr.
148 ;--------------------------------------------------------------------------------
149 0028 1090 LACC *- ; ACC=entry_new.
150 ; also decrement AR0 to point to entry_old.
151 ; ARP=AR0. AR0->FR1 and AR2->sector_ptr.
152 ;--------------------------------------------------------------------------------
153 0029 308a SUB *,AR2 ; ACC=entry_new-entry_old.
154 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
155 ;--------------------------------------------------------------------------------
156 002a e38c BCND __SVGEN_Branch_Sr, GEQ
002b 0037'
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
svgen_mf.asm PAGE 4
157 ; if greater than or eq. to 0 skip sector incr.
158 ;--------------------------------------------------------------------------------
159 002c __SVGEN_Modify_Sr_Ptr:
160 ; AR2 points to sector_ptr.
161 002c 1080 LACC * ; get sector_ptr.
162 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
163 ;--------------------------------------------------------------------------------
164 002d ba05 SUB #05h ;
165 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
166 ;--------------------------------------------------------------------------------
167 002e e388 BCND __SVGEN_Reset_Sr_Ptr,EQ
002f 0035'
168 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
169 ;--------------------------------------------------------------------------------
170 0030 1080 LACC * ; get sector_ptr.
171 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
172 ;--------------------------------------------------------------------------------
173 0031 b801 ADD #1 ; increment sector_ptr.
174 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
175 ;--------------------------------------------------------------------------------
176 0032 9080 SACL * ; store sector_ptr.
177 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
178 ;--------------------------------------------------------------------------------
179 0033 7980 B __SVGEN_Branch_Sr
0034 0037'
180 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
181 ;--------------------------------------------------------------------------------
182 0035 __SVGEN_Reset_Sr_Ptr:
183 0035 ae80 SPLK #0,* ; sector_ptr=0.
0036 0000
184 ; ARP=AR2. AR0->FR1 and AR2->sector_ptr.
185 ;--------------------------------------------------------------------------------
186 ; On getting here ARP=AR2. AR0->FR1 and AR2->sector_ptr.
187 0037 __SVGEN_Branch_Sr:
188
189 0037 bf80 LACC #_SVGEN_SECTOR_TABLE
0038 00c0'
190 ;--------------------------------------------------------------------------------
191 0039 2088 ADD *,AR0 ; add sector_ptr and
192 ; ARP=AR0. AR0->FR1 and AR2->sector_ptr
193 ;--------------------------------------------------------------------------------
194 003a a680 TBLR * ; get sector routine address in FR1.
195 ; ARP=AR0. AR0->FR1 and AR2->sector_ptr
196 ;--------------------------------------------------------------------------------
197 003b 1080 LACC * ; get sector routine address in FR1.
198 ; ARP=AR0. AR0->FR1 and AR2->sector_ptr
199 ;--------------------------------------------------------------------------------
200 003c 7802 ADRK #2 ; move AR0 to point to FR3
201 ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
202 ;--------------------------------------------------------------------------------
203 003d be20 BACC ; go to the sector routine for present sector.
204 ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
205 ;--------------------------------------------------------------------------------
206 003e __SVGEN_Sector1: ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
svgen_mf.asm PAGE 5
207
208 003e bf80 LACC #7fffh ; ACC=1.
003f 7fff
209 ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
210 ;--------------------------------------------------------------------------------
211 0040 30a0 SUB *+ ; ACC=1-dy
212 ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
213 ;--------------------------------------------------------------------------------
214 0041 308a SUB *,AR2 ; ACC=1-dy-dx.
215 ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
216 ;--------------------------------------------------------------------------------
217 0042 be0a SFR ; ACC=(1-dy-dx)/2.
218 ; ARP=AR2. AR0->FR4 and AR2->sector_ptr
219 ;--------------------------------------------------------------------------------
220 0043 7801 ADRK #1 ; point AR2 to va
221 ; ARP=AR2. AR0->FR4 and AR2->va
222 ;--------------------------------------------------------------------------------
223 0044 90a8 SACL *+,AR0 ; store va.
224 ; ARP=AR0. AR0->FR4 and AR2->vb
225 ;--------------------------------------------------------------------------------
226 0045 208a ADD *,AR2 ; ACC=va+dx
227 ; ARP=AR2. AR0->FR4 and AR2->vb
228 ;--------------------------------------------------------------------------------
229 0046 9090 SACL *- ; store vb.
230 ; ARP=AR2. AR0->FR4 and AR2->va
231 ;--------------------------------------------------------------------------------
232 0047 bf80 LACC #7fffh ; ACC=1.
0048 7fff
233 ; ARP=AR2. AR0->FR4 and AR2->va
234 ;--------------------------------------------------------------------------------
235 0049 3080 SUB * ; ACC=1-va
236 ; ARP=AR2. AR0->FR4 and AR2->va
237 ;--------------------------------------------------------------------------------
238 004a 7802 ADRK #2 ; ARP=AR2. AR0->FR4 and AR2->vc
239 ;--------------------------------------------------------------------------------
240 004b 9080 SACL * ; store vc.
241 ; ARP=AR2. AR0->FR4 and AR2->vc
242 ;--------------------------------------------------------------------------------
243 004c 7980 B __SVGEN_gen_outputs
004d 00a0'
244 ; ARP=AR2. AR0->FR4 and AR2->vc
245 ;--------------------------------------------------------------------------------
246
247 004e __SVGEN_Sector2: ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
248 004e bf80 LACC #7fffh
004f 7fff
249 ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
250 ;--------------------------------------------------------------------------------
251 0050 30a0 SUB *+ ; ACC=1-dy
252 ; ARP=AR0. AR0->FR4 and AR2->sector_ptr
253 ;--------------------------------------------------------------------------------
254 0051 309a SUB *-,AR2 ; ACC=1-dy-dx
255 ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
256 ;--------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:41:11 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
svgen_mf.asm PAGE 6
257 0052 be0a SFR ; ACC=(1-dy-dx)/2.
258 ; ARP=AR2. AR0->FR3 and AR2->sector_ptr
259 ;--------------------------------------------------------------------------------
260 0053 7802 ADRK #2 ; ARP=AR2. AR0->FR3 and AR2->vb
261 ;--------------------------------------------------------------------------------
262 0054 9098 SACL *-,AR0 ; store vb
263 ; ARP=AR0. AR0->FR3 and AR2->va
264 ;--------------------------------------------------------------------------------
265 0055 20aa ADD *+,AR2 ; ACC=(vb+dy)=va
266 ; ARP=AR2. AR0->FR4 and AR2->va
267 ;--------------------------------------------------------------------------------
268 0056 90a0 SACL *+ ; store va
269 ; ARP=AR2. AR0->FR4 and AR2->vb
270 ;--------------------------------------------------------------------------------
271 0057 bf80 LACC #7fffh ; ACC=1
0058 7fff
272 ; ARP=AR2. AR0->FR4 and AR2->vb
273 ;--------------------------------------------------------------------------------
274 0059 30a0 SUB *+ ; ACC=1-vb.
275 ; ARP=AR2. AR0->FR4 and AR2->vc
276 ;--------------------------------------------------------------------------------
277 005a 9080 SACL * ; store Vc
278 ; ARP=AR2. AR0->FR4 and AR2->vc
279 ;--------------------------------------------------------------------------------
280 005b 7980 B __SVGEN_gen_outputs
005c 00a0'
281 ; ARP=AR2. AR0->FR4 and AR2->vc
282 ;--------------------------------------------------------------------------------
283 005d __SVGEN_Sector3: ; on entry: ARP=AR0. AR0->FR3 and AR2->sector_ptr
284 005d bf80 LACC #7fffh ; ACC=1.
005e 7fff
285 ; ARP=AR0. AR0->FR3 and AR2->sector_ptr
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