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📄 power_converter.mdl

📁 Three-phase thyristor converter 变频器
💻 MDL
📖 第 1 页 / 共 4 页
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      LogicDataType	      "uint(8)"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Memory
      X0		      "0"
      InheritSampleTime	      off
      LinearizeMemory	      off
      StateMustResolveToSignalObject off
      RTWStateStorageClass    "Auto"
    }
    Block {
      BlockType		      Mux
      Inputs		      "4"
      DisplayOption	      "none"
      UseBusObject	      off
      BusObject		      "BusObject"
      NonVirtualBus	      off
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      PMComponent
      SubClassName	      "unknown"
    }
    Block {
      BlockType		      PMIOPort
    }
    Block {
      BlockType		      Reference
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Saturate
      UpperLimit	      "0.5"
      LowerLimit	      "-0.5"
      LinearizeAsGain	      on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Selector
      InputType		      "Vector"
      IndexMode		      "One-based"
      ElementSrc	      "Internal"
      Elements		      "1"
      RowSrc		      "Internal"
      Rows		      "1"
      ColumnSrc		      "Internal"
      Columns		      "1"
      InputPortWidth	      "-1"
      IndexIsStartValue	      off
      OutputPortSize	      "1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      Sin
      SineType		      "Time based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Bias		      "0"
      Frequency		      "1"
      Phase		      "0"
      Samples		      "10"
      Offset		      "0"
      SampleTime	      "-1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      Step
      Time		      "1"
      Before		      "0"
      After		      "1"
      SampleTime	      "-1"
      VectorParams1D	      on
      ZeroCross		      on
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Switch
      Criteria		      "u2 >= Threshold"
      Threshold		      "0"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Terminator
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "power_converter"
    Location		    [12, 83, 923, 667]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Constant
      Name		      "Constant"
      Position		      [265, 284, 295, 306]
      ShowName		      off
      Value		      "0"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant1"
      Position		      [430, 459, 450, 481]
      Orientation	      "left"
      ShowName		      off
      Value		      "90"
    }
    Block {
      BlockType		      Reference
      Name		      "DC Voltage Source2"
      Description	      "source block"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [600, 215, 620, 255]
      Orientation	      "up"
      NamePlacement	      "alternate"
      ShowName		      off
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Electrical\nSources/DC Voltage Source"
      SourceType	      "DC Voltage Source"
      ShowPortLabels	      on
      Amplitude		      "120"
      Measurements	      "None"
    }
    Block {
      BlockType		      Gain
      Name		      "Gain2"
      Position		      [445, 419, 480, 451]
      Orientation	      "left"
      ShowName		      off
      Gain		      "100"
    }
    Block {
      BlockType		      Gain
      Name		      "Gain3"
      Position		      [410, 379, 450, 411]
      Orientation	      "left"
      ShowName		      off
      Gain		      "5"
    }
    Block {
      BlockType		      Reference
      Name		      "Id"
      Tag		      "PoWeRsYsTeMmEaSuReMeNt"
      Ports		      [0, 1, 0, 0, 0, 1, 1]
      Position		      [550, 83, 575, 107]
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Measurements/Current Measurement"
      SourceType	      "Current Measurement"
      ShowPortLabels	      on
      PhasorSimulation	      off
      OutputType	      "Complex"
      PSBequivalent	      "0"
    }
    Block {
      BlockType		      Step
      Name		      "Id_Refence"
      Position		      [625, 429, 645, 451]
      Orientation	      "left"
      Time		      "0.04"
      Before		      "10"
      After		      "25"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Integrator
      Name		      "Integrator1"
      Ports		      [1, 1]
      Position		      [395, 414, 420, 456]
      Orientation	      "left"
      ShowName		      off
      InitialCondition	      "20"
      LimitOutput	      on
      UpperSaturationLimit    "160"
      LowerSaturationLimit    "20"
      IgnoreLimit	      off
    }
    Block {
      BlockType		      Mux
      Name		      "Mux1"
      Ports		      [2, 1]
      Position		      [735, 328, 740, 372]
      BackgroundColor	      "black"
      ShowName		      off
      Inputs		      "2"
      Port {
	PortNumber		1
	Name			"Id & Id_ref"
	PropagatedSignals	", "
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
    }
    Block {
      BlockType		      Mux
      Name		      "Mux2"
      Ports		      [2, 1]
      Position		      [745, 51, 750, 109]
      BackgroundColor	      "black"
      ShowName		      off
      Inputs		      "2"
      Port {
	PortNumber		1
	Name			"iA & iB"
	PropagatedSignals	", "
	RTWStorageClass		"Auto"
	DataLoggingNameMode	"SignalName"
      }
    }
    Block {
      BlockType		      Saturate
      Name		      "Saturation1"
      Position		      [290, 425, 310, 445]
      Orientation	      "left"
      ShowName		      off
      UpperLimit	      "160"
      LowerLimit	      "20"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [3]
      Position		      [825, 223, 870, 277]
      BackgroundColor	      "green"
      Floating		      off
      Location		      [509, 295, 1002, 677]
      Open		      off
      NumInputPorts	      "3"
      ZoomMode		      "xonly"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
	axes3			"%<SignalLabel>"
      }
      TimeRange		      "0.1"
      YMin		      "-50~-200~-3.20216e-017"
      YMax		      "50~400~40"
      SaveToWorkspace	      on
      SaveName		      "psbconverter_str"
      DataFormat	      "StructureWithTime"
      LimitDataPoints	      off
      SampleInput	      on
      SampleTime	      "1/60/512"
    }
    Block {
      BlockType		      Reference
      Name		      "Series RLC Branch2"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [596, 125, 624, 180]
      Orientation	      "down"
      NamePlacement	      "alternate"
      ShowName		      off
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "RL"
      Resistance	      "1"
      Inductance	      "20e-3"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "[]"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "Series RLC Branch6"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [180, 90, 230, 110]
      NamePlacement	      "alternate"
      ShowName		      off
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "RL"
      Resistance	      "0.01"
      Inductance	      "1e-3"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "[]"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "Series RLC Branch7"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [180, 109, 230, 131]
      NamePlacement	      "alternate"
      ShowName		      off
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "RL"
      Resistance	      "0.01"
      Inductance	      "1e-3"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "[]"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "Series RLC Branch8"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [180, 133, 230, 157]
      NamePlacement	      "alternate"
      ShowName		      off
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "RL"
      Resistance	      "0.01"
      Inductance	      "1e-3"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "[]"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Sum
      Name		      "Sum3"
      Ports		      [2, 1]
      Position		      [530, 417, 555, 448]
      Orientation	      "left"
      ShowName		      off
      Inputs		      "-+"
    }
    Block {
      BlockType		      Sum
      Name		      "Sum4"
      Ports		      [3, 1]
      Position		      [335, 418, 350, 452]
      Orientation	      "left"
      ShowName		      off
      Inputs		      "--+"
    }
    Block {
      BlockType		      Reference
      Name		      "Synchronized\n6-Pulse Generator"
      Ports		      [5, 1]
      Position		      [315, 207, 410, 303]
      DropShadow	      on
      SourceBlock	      "powerlib_extras/Control \nBlocks/Synchronized\n"
"6-Pulse Generator"
      SourceType	      "Synchronized 6-pulse generator"
      ShowPortLabels	      on
      freq		      "60"
      pwidth		      "10"
      Double_Pulse	      on
    }
    Block {
      BlockType		      Reference
      Name		      "Thyristor Converter"
      Ports		      [1, 0, 0, 0, 0, 3, 2]
      Position		      [460, 74, 525, 156]
      BackgroundColor	      "yellow"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Power\nElectronics/Universal Bridge"
      SourceType	      "Universal Bridge"
      ShowPortLabels	      on
      Arms		      "3"
      SnubberResistance	      "500"
      SnubberCapacitance      ".1e-6"
      Device		      "Thyristors"
      Ron		      "1e-3"
      Lon		      "0"
      ForwardVoltages	      "[  0.8  0.8  ]"
      ForwardVoltage	      ".8"
      GTOparameters	      "[ 10e-6 , 20e-6 ]"
      IGBTparameters	      "[ 1e-6 , 2e-6 ]"
      Measurements	      "None"
      converterType	      "Rectifier"
    }
    Block {
      BlockType		      Reference
      Name		      "Va"
      Description	      "source block"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [38, 330, 62, 365]
      Orientation	      "up"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Electrical\nSources/AC Voltage Source"
      SourceType	      "AC Voltage Source"
      ShowPortLabels	      on
      Amplitude		      "208*sqrt(2/3)"
      Phase		      "0"
      Frequency		      "60"
      SampleTime	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "Vab"
      Tag		      "PoWeRsYsTeMmEaSuReMeNt"
      Ports		      [0, 1, 0, 0, 0, 2]
      Position		      [205, 203, 230, 227]
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Measurements/Voltage Measurement"
      SourceType	      "Voltage Measurement"
      ShowPortLabels	      on
      PhasorSimulation	      off
      OutputType	      "Complex"
      PSBequivalent	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "Vb"
      Description	      "source block"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [78, 330, 102, 365]
      Orientation	      "up"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Electrical\nSources/AC Voltage Source"

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