net_phy.h

来自「Micrium_PHY_DM9161AE.zip ucos系统下物理层PHY_」· C头文件 代码 · 共 234 行 · 第 1/2 页

/*
*********************************************************************************************************
*                                              uC/TCP-IP
*                                      The Embedded TCP/IP Suite
*
*                          (c) Copyright 2003-2006; Micrium, Inc.; Weston, FL
*
*               All rights reserved.  Protected by international copyright laws.
*
*               uC/TCP-IP is provided in source form for FREE evaluation, for educational
*               use or peaceful research.  If you plan on using uC/TCP-IP in a commercial
*               product you need to contact Micrium to properly license its use in your
*               product.  We provide ALL the source code for your convenience and to help
*               you experience uC/TCP-IP.  The fact that the source code is provided does
*               NOT mean that you can use it without paying a licensing fee.
*
*               Network Interface Card (NIC) port files provided, as is, for FREE and do
*               NOT require any additional licensing or licensing fee.
*
*               Knowledge of the source code may NOT be used to develop a similar product.
*
*               Please help us continue to provide the Embedded community with the finest
*               software available.  Your honesty is greatly appreciated.
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*
*                                        NETWORK PHYSICAL LAYER
*
*                                              DM9161AE
*
* Filename      : net_phy.h
* Version       : V1.87
* Programmer(s) : EHS
*********************************************************************************************************
* Note(s)       : (1) Supports DM9161AE '3.3V Dual-Speed Fast Ethernet Transceiver' as described in
*
*                         Corporation (INTEL; http://www.intel.com)
*                         (a) DM9161AE       (DM9161AE; Revision 249414-002)
*********************************************************************************************************
*/

#ifndef _NET_PHY_H
#define _NET_PHY_H

/*
*********************************************************************************************************
*                                               INCLUDES
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                               DEFINES
*********************************************************************************************************
*/

#define DM9161AE_INIT_AUTO_NEG_RETRIES         3

                                                                /* Generic MII registers. */
#define MII_BMCR                            0x00                /* Basic mode control register */
#define MII_BMSR                            0x01                /* Basic mode status register  */
#define MII_PHYSID1                         0x02                /* PHYS ID 1                   */
#define MII_PHYSID2                         0x03                /* PHYS ID 2                   */
#define MII_ADVERTISE                       0x04                /* Advertisement control reg   */
#define MII_LPA                             0x05                /* Link partner ability reg    */
#define MII_EXPANSION                       0x06                /* Expansion register          */
#define MII_DCOUNTER                        0x12                /* Disconnect counter          */
#define MII_FCSCOUNTER                      0x13                /* False carrier counter       */
#define MII_NWAYTEST                        0x14                /* N-way auto-neg test reg     */
#define MII_RERRCOUNTER                     0x15                /* Receive error counter       */
#define MII_SREVISION                       0x16                /* Silicon revision            */
#define MII_RESV1                           0x17                /* Reserved...                 */
#define MII_LBRERROR                        0x18                /* Lpback, rx, bypass error    */
#define MII_PHYADDR                         0x19                /* PHY address                 */
#define MII_RESV2                           0x1A                /* Reserved...                 */
#define MII_TPISTATUS                       0x1B                /* TPI status for 10mbps       */
#define MII_NCONFIG                         0x1C                /* Network interface config    */

                                                                /* Basic mode control register. */
#define BMCR_RESV                         0x007F                /* Unused...                   */
#define BMCR_CTST                         0x0080                /* Collision test              */
#define BMCR_FULLDPLX                     0x0100                /* Full duplex                 */
#define BMCR_ANRESTART                    0x0200                /* Auto negotiation restart    */
#define BMCR_ISOLATE                      0x0400                /* Disconnect DP83840 from MII */
#define BMCR_PDOWN                        0x0800                /* Powerdown the DP83840       */
#define BMCR_ANENABLE                     0x1000                /* Enable auto negotiation     */
#define BMCR_SPEED100                     0x2000                /* Select 100Mbps              */
#define BMCR_LOOPBACK                     0x4000                /* TXD loopback bits           */
#define BMCR_RESET                        0x8000                /* Reset the DP83840           */

                                                                /* Basic mode status register. */
#define BMSR_ERCAP                        0x0001                /* Ext-reg capability          */
#define BMSR_JCD                          0x0002                /* Jabber detected             */
#define BMSR_LSTATUS                      0x0004                /* Link status                 */
#define BMSR_ANEGCAPABLE                  0x0008                /* Able to do auto-negotiation */
#define BMSR_RFAULT                       0x0010                /* Remote fault detected       */
#define BMSR_ANEGCOMPLETE                 0x0020                /* Auto-negotiation complete   */
#define BMSR_RESV                         0x07C0                /* Unused...                   */
#define BMSR_10HALF                       0x0800                /* Can do 10mbps, half-duplex  */
#define BMSR_10FULL                       0x1000                /* Can do 10mbps, full-duplex  */
#define BMSR_100HALF                      0x2000                /* Can do 100mbps, half-duplex */
#define BMSR_100FULL                      0x4000                /* Can do 100mbps, full-duplex */
#define BMSR_100BASE4                     0x8000                /* Can do 100mbps, 4k packets  */

                                                                /* Advertisement control reg   */
#define ADVERTISE_SLCT                    0x001F                /* Selector bits               */
#define ADVERTISE_CSMA                    0x0001                /* Only selector supported     */
#define ADVERTISE_10HALF                  0x0020                /* Try for 10mbps half-duplex  */
#define ADVERTISE_10FULL                  0x0040                /* Try for 10mbps full-duplex  */
#define ADVERTISE_100HALF                 0x0080                /* Try for 100mbps half-duplex */
#define ADVERTISE_100FULL                 0x0100                /* Try for 100mbps full-duplex */
#define ADVERTISE_100BASE4                0x0200                /* Try for 100mbps 4k packets  */
#define ADVERTISE_RESV                    0x1C00                /* Unused...                   */
#define ADVERTISE_RFAULT                  0x2000                /* Say we can detect faults    */