📄 dsp16xx.c
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offset = INTVAL(XEXP(addr,1)), base = XEXP(addr,0); if (GET_CODE (base) == REG && REGNO(base) == STACK_POINTER_REGNUM) { if (offset >= -31 && offset <= 0) offset = 31 + offset; else fatal ("Invalid offset in ybase addressing"); } else fatal ("Invalid register in ybase addressing"); fprintf (file, "*(%d)", offset); break; default: if( FITS_5_BITS( addr ) ) fprintf( file, "*(0x%x)", (INTVAL(addr) & 0x20) ); else output_addr_const(file, addr); }}voidoutput_dsp16xx_float_const(operands)rtx *operands;{ rtx dst = operands[0]; rtx src = operands[1]; #if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT REAL_VALUE_TYPE d; long value; REAL_VALUE_FROM_CONST_DOUBLE (d, src); REAL_VALUE_TO_TARGET_SINGLE (d, value); operands[1] = GEN_INT (value); output_asm_insn ("%u0=%U1\n\t%w0=%H1", operands);#else fatal ("inline float constants not supported on this host");#endif}intreg_save_size (){ int reg_save_size = 0; int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (dsp16xx_call_saved_register (regno)) { reg_save_size += UNITS_PER_WORD; } return (reg_save_size);}intdsp16xx_starting_frame_offset(){ int reg_save_size = 0; int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (dsp16xx_call_saved_register (regno)) { reg_save_size += UNITS_PER_WORD; } return (reg_save_size);}intinitial_frame_pointer_offset(){ int frame_size; int regno; int offset = 0; offset = compute_frame_size (get_frame_size());#ifdef STACK_GROWS_DOWNWARD return (offset);#else return (-offset);#endif}/* Generate the minimum number of 1600 core shift instructions to shift by 'shift_amount'. */#if 0voidemit_1600_core_shift (shift_op, operands, shift_amount, mode)enum rtx_code shift_op;rtx *operands;int shift_amount;enum machine_mode mode;{ int quotient; int i; int first_shift_emitted = 0; while (shift_amount != 0) { if (shift_amount/16) { quotient = shift_amount/16; shift_amount = shift_amount - (quotient * 16); for (i = 0; i < quotient; i++) emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], GEN_INT (16)))); first_shift_emitted = 1; } else if (shift_amount/8) { quotient = shift_amount/8; shift_amount = shift_amount - (quotient * 8); for (i = 0; i < quotient; i++) emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], GEN_INT (8)))); first_shift_emitted = 1; } else if (shift_amount/4) { quotient = shift_amount/4; shift_amount = shift_amount - (quotient * 4); for (i = 0; i < quotient; i++) emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], GEN_INT (4)))); first_shift_emitted = 1; } else if (shift_amount/1) { quotient = shift_amount/1; shift_amount = shift_amount - (quotient * 1); for (i = 0; i < quotient; i++) emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], GEN_INT (1)))); first_shift_emitted = 1; } }}#elsevoidemit_1600_core_shift (shift_op, operands, shift_amount)enum rtx_code shift_op;rtx *operands;int shift_amount;{ int quotient; int i; int first_shift_emitted = 0; char **shift_asm_ptr; char **shift_asm_ptr_first; if (shift_op == ASHIFT) { shift_asm_ptr = ashift_left_asm; shift_asm_ptr_first = ashift_left_asm_first; } else if (shift_op == ASHIFTRT) { shift_asm_ptr = ashift_right_asm; shift_asm_ptr_first = ashift_right_asm_first; } else if (shift_op == LSHIFTRT) { shift_asm_ptr = lshift_right_asm; shift_asm_ptr_first = lshift_right_asm_first; } else fatal ("Invalid shift operator in emit_1600_core_shift"); while (shift_amount != 0) { if (shift_amount/16) { quotient = shift_amount/16; shift_amount = shift_amount - (quotient * 16); for (i = 0; i < quotient; i++) output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_16] : shift_asm_ptr_first[SHIFT_INDEX_16]), operands); first_shift_emitted = 1; } else if (shift_amount/8) { quotient = shift_amount/8; shift_amount = shift_amount - (quotient * 8); for (i = 0; i < quotient; i++) output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_8] : shift_asm_ptr_first[SHIFT_INDEX_8]), operands); first_shift_emitted = 1; } else if (shift_amount/4) { quotient = shift_amount/4; shift_amount = shift_amount - (quotient * 4); for (i = 0; i < quotient; i++) output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_4] : shift_asm_ptr_first[SHIFT_INDEX_4]), operands); first_shift_emitted = 1; } else if (shift_amount/1) { quotient = shift_amount/1; shift_amount = shift_amount - (quotient * 1); for (i = 0; i < quotient; i++) output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_1] : shift_asm_ptr_first[SHIFT_INDEX_1]), operands); first_shift_emitted = 1; } }}#endifvoid asm_output_common(file, name, size, rounded)FILE *file;char *name;int size;int rounded;{ bss_section (); ASM_GLOBALIZE_LABEL (file, name); assemble_name (file, name); fputs (":", file); if (rounded > 1) fprintf (file, "%d * int\n", rounded); else fprintf (file, "int\n");}voidasm_output_local(file, name, size, rounded)FILE *file;char *name;int size;int rounded;{ bss_section (); assemble_name (file, name); fputs (":", file); if (rounded > 1) fprintf (file, "%d * int\n", rounded); else fprintf (file, "int\n");}voidasm_output_float (file, fp_const)FILE *file;double fp_const;{#if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT REAL_VALUE_TYPE d = fp_const; long value; REAL_VALUE_TO_TARGET_SINGLE (d, value); fputs ("\tint ", file);#ifdef WORDS_BIG_ENDIAN fprintf (file, "0x%-4.4x, 0x%-4.4x", (value >> 16) & 0xffff, (value & 0xffff));#else fprintf (file, "0x%-4.4x, 0x%-4.4x", (value & 0xffff), (value >> 16) & 0xffff);#endif fputs ("\n", file);#else fatal ("inline float constants not supported on this host");#endif}voidasm_output_long (file, value)FILE *file;long value;{ fputs ("\tint ", file);#ifdef WORDS_BIG_ENDIAN fprintf (file, "0x%-4.4x, 0x%-4.4x", (value >> 16) & 0xffff, (value & 0xffff));#else fprintf (file, "0x%-4.4x, 0x%-4.4x", (value & 0xffff), (value >> 16) & 0xffff);#endif fputs ("\n", file);}intdsp16xx_address_cost (addr)rtx addr;{ switch (GET_CODE (addr)) { default: break; case REG: return 1; case CONST: { rtx offset = const0_rtx; addr = eliminate_constant_term (addr, &offset); if (GET_CODE (addr) == LABEL_REF) return 2; if (GET_CODE (addr) != SYMBOL_REF) return 4; if (INTVAL (offset) == 0) return 2; } /* fall through */ case POST_INC: case POST_DEC: return (GET_MODE (addr) == QImode ? 1 : 2); case SYMBOL_REF: case LABEL_REF: return 2; case PLUS: { register rtx plus0 = XEXP (addr, 0); register rtx plus1 = XEXP (addr, 1); if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG) { plus0 = XEXP (addr, 1); plus1 = XEXP (addr, 0); } if (GET_CODE (plus0) != REG) break; switch (GET_CODE (plus1)) { default: break; case CONST_INT: return 4; case CONST: case SYMBOL_REF: case LABEL_REF: return dsp16xx_address_cost (plus1) + 1; } } } return 4;}/* Determine whether a function argument is passed in a register, and which register. The arguments are CUM, which summarizes all the previous arguments; MODE, the machine mode of the argument; TYPE, the data type of the argument as a tree node or 0 if that is not known (which happens for C support library functions); and NAMED, which is 1 for an ordinary argument and 0 for nameless arguments that correspond to `...' in the called function's prototype. The value of the expression should either be a `reg' RTX for the hard register in which to pass the argument, or zero to pass the argument on the stack. On the dsp1610 the first four words of args are normally in registers and the rest are pushed. If we a long or on float mode, the argument must begin on a even register boundary Note that FUNCTION_ARG and FUNCTION_INCOMING_ARG were different. For structures that are passed in memory, but could have been passed in registers, we first load the structure into the register, and then when the last argument is passed, we store the registers into the stack locations. This fixes some bugs where GCC did not expect to have register arguments, followed */struct rtx_def *dsp16xx_function_arg (args_so_far, mode, type, named) CUMULATIVE_ARGS args_so_far; enum machine_mode mode; tree type; int named;{ if (TARGET_REGPARM) { if ((args_so_far & 1) != 0 && (mode == HImode || GET_MODE_CLASS(mode) == MODE_FLOAT)) args_so_far++; if (named && args_so_far < 4 && !MUST_PASS_IN_STACK (mode,type)) return gen_rtx (REG, mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG); else return (struct rtx_def *) 0; } else return (struct rtx_def *) 0;}/* Advance the argument to the next argument position. */voiddsp16xx_function_arg_advance (cum, mode, type, named) CUMULATIVE_ARGS *cum; /* current arg information */ enum machine_mode mode; /* current arg mode */ tree type; /* type of the argument or 0 if lib support */ int named; /* whether or not the argument was named */{ if (TARGET_REGPARM) { if ((*cum & 1) != 0 && (mode == HImode || GET_MODE_CLASS(mode) == MODE_FLOAT)) *cum += 1; if (mode != BLKmode) *cum += GET_MODE_SIZE (mode); else *cum += int_size_in_bytes (type); }}voiddsp16xx_file_start (){ fprintf (asm_out_file, "#include <%s.h>\n", save_chip_name);#if 0 if (TARGET_BMU) fprintf (asm_out_file, "#include <1610.h>\n");#endif}rtxgen_tst_reg (x) rtx x;{ enum machine_mode mode; mode = GET_MODE (x); if (mode == QImode) { emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, gen_rtx (SET, VOIDmode, cc0_rtx, x), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); } else if (mode == HImode) emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, x)); else fatal ("Invalid mode for gen_tst_reg"); return cc0_rtx;}rtxgen_compare_reg (code, x, y) enum rtx_code code; rtx x, y;{ enum machine_mode mode; mode = GET_MODE (x); /* For floating point compare insns, a call is generated so don't do anything here. */ if (GET_MODE_CLASS (mode) == MODE_FLOAT) return cc0_rtx; if (mode == QImode) { if (code == GTU || code == GEU || code == LTU || code == LEU) { emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (3, gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, mode, x, y)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); } else { emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (3, gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, mode, x, y)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); } } else if (mode == HImode) { if (code == GTU || code == GEU || code == LTU || code == LEU) {#if 1 emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5, gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, x, y)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)))));#else if (!dsp16xx_ucmphi2_libcall) dsp16xx_ucmphi2_libcall = gen_rtx (SYMBOL_REF, Pmode, UCMPHI2_LIBCALL); emit_library_call (dsp16xx_ucmphi2_libcall, 1, HImode, 2, x, HImode, y, HImode); emit_insn (gen_tsthi_1 (copy_to_reg(hard_libcall_value (HImode))));#endif } else emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, force_reg(HImode, x), force_reg(HImode,y)))); } else fatal ("Invalid mode for integer comparison in gen_compare_reg"); return cc0_rtx;}char *output_block_move (operands) rtx operands[];{ int loop_count = INTVAL(operands[2]); rtx xoperands[4]; fprintf (asm_out_file, "\tdo %d {\n", loop_count); xoperands[0] = operands[4]; xoperands[1] = operands[1]; output_asm_insn ("%0=*%1++", xoperands); xoperands[0] = operands[0]; xoperands[1] = operands[4]; output_asm_insn ("*%0++=%1", xoperands); fprintf (asm_out_file, "\t}\n"); return "";}voiddsp16xx_invalid_register_for_compare (){ fatal ("Invalid register for compare");}
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