dsp16xx.md

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{
  if (!dsp16xx_mulhi3_libcall)
    dsp16xx_mulhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL);

   emit_library_call (dsp16xx_mulhi3_libcall, 1, HImode, 2,
		      operands[1], HImode,
		      operands[2], HImode);
   emit_move_insn (operands[0], hard_libcall_value(HImode));
   DONE;
}")

(define_insn "mulqi3"
  [(set (match_operand:QI 0 "register_operand" "=w")
        (mult:QI (match_operand:QI 1 "register_operand" "%x")
                 (match_operand:QI 2 "register_operand" "y")))
   (clobber (match_scratch:QI 3 "=v"))]
  ""
  "%m0=%1*%2"
  [(set_attr "type" "malu_mul")])

(define_insn "mulqihi3"
  [(set (match_operand:HI 0 "register_operand" "=t")
        (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%x"))
                 (sign_extend:HI (match_operand:QI 2 "register_operand" "y"))))]
  ""
  "%0=%1*%2"
  [(set_attr "type" "malu_mul")])

(define_insn "umulqihi3"
  [(set (match_operand:HI 0 "register_operand" "=t")
        (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%x"))
                 (zero_extend:HI (match_operand:QI 2 "register_operand" "y"))))]
  ""
  "%0=%1*%2"
  [(set_attr "type" "malu_mul")])

(define_expand "mulhf3"
  [(set (match_operand:HF 0 "register_operand" "")
	(mult:HF (match_operand:HF 1 "register_operand" "")
		 (match_operand:HF 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_mulhf3_libcall)
    dsp16xx_mulhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHF3_LIBCALL);
  
  emit_library_call (dsp16xx_mulhf3_libcall, 1, HFmode, 2,
		     operands[1], HFmode,
		     operands[2], HFmode);
  emit_move_insn (operands[0], hard_libcall_value(HFmode));
  DONE;
}")



;;
;; *******************
;;
;; Divide Instructions
;;

(define_expand "divhi3"
  [(set (match_operand:HI 0 "register_operand" "")
	(div:HI (match_operand:HI 1 "register_operand" "")
		 (match_operand:HI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_divhi3_libcall)
    dsp16xx_divhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL);

   emit_library_call (dsp16xx_divhi3_libcall, 1, HImode, 2,
		      operands[1], HImode,
		      operands[2], HImode);
   emit_move_insn (operands[0], hard_libcall_value(HImode));
   DONE;
}")

(define_expand "udivhi3"
  [(set (match_operand:HI 0 "register_operand" "")
	(udiv:HI (match_operand:HI 1 "register_operand" "")
		 (match_operand:HI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_udivhi3_libcall)
    dsp16xx_udivhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL);
  
  emit_library_call (dsp16xx_udivhi3_libcall, 1, HImode, 2,
		     operands[1], HImode,
		     operands[2], HImode);
  emit_move_insn (operands[0], hard_libcall_value(HImode));
  DONE;
}")

(define_expand "divqi3"
  [(set (match_operand:QI 0 "register_operand" "")
	(div:QI (match_operand:QI 1 "register_operand" "")
		 (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_divqi3_libcall)
    dsp16xx_divqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVQI3_LIBCALL);
  
  emit_library_call (dsp16xx_divqi3_libcall, 1, QImode, 2,
		     operands[1], QImode,
		     operands[2], QImode);
  emit_move_insn (operands[0], hard_libcall_value(QImode));
  DONE;
}")

(define_expand "udivqi3"
  [(set (match_operand:QI 0 "register_operand" "")
	(udiv:QI (match_operand:QI 1 "register_operand" "")
		 (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_udivqi3_libcall)
    dsp16xx_udivqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVQI3_LIBCALL);

   emit_library_call (dsp16xx_udivqi3_libcall, 1, QImode, 2,
		      operands[1], QImode,
		      operands[2], QImode);
   emit_move_insn (operands[0], hard_libcall_value(QImode));
   DONE;
}")

;;
;;  ....................
;;
;;  Modulo instructions
;;
;;  ....................

(define_expand "modhi3"
  [(set (match_operand:HI 0 "register_operand" "")
	(mod:HI (match_operand:HI 1 "register_operand" "")
		(match_operand:HI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_modhi3_libcall)
    dsp16xx_modhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL);
  
  emit_library_call (dsp16xx_modhi3_libcall, 1, HImode, 2,
		     operands[1], HImode,
		     operands[2], HImode);
  emit_move_insn (operands[0], hard_libcall_value(HImode));
  DONE;
}")

(define_expand "umodhi3"
  [(set (match_operand:HI 0 "register_operand" "")
	(umod:HI (match_operand:HI 1 "register_operand" "")
		 (match_operand:HI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_umodhi3_libcall)
    dsp16xx_umodhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL);
  
  emit_library_call (dsp16xx_umodhi3_libcall, 1, HImode, 2,
		     operands[1], HImode,
		     operands[2], HImode);
  emit_move_insn (operands[0], hard_libcall_value(HImode));
  DONE;
}")

(define_expand "modqi3"
  [(set (match_operand:QI 0 "register_operand" "")
	(mod:QI (match_operand:QI 1 "register_operand" "")
		(match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_modqi3_libcall)
    dsp16xx_modqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODQI3_LIBCALL);
  
  emit_library_call (dsp16xx_modqi3_libcall, 1, QImode, 2,
		     operands[1], QImode,
		     operands[2], QImode);
  emit_move_insn (operands[0], hard_libcall_value(QImode));
  DONE;
}")

(define_expand "umodqi3"
  [(set (match_operand:QI 0 "register_operand" "")
	(umod:QI (match_operand:QI 1 "register_operand" "")
		 (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_umodqi3_libcall)
    dsp16xx_umodqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODQI3_LIBCALL);
  
  emit_library_call (dsp16xx_umodqi3_libcall, 1, QImode, 2,
		     operands[1], QImode,
		     operands[2], QImode);
  emit_move_insn (operands[0], hard_libcall_value(QImode));
  DONE;
}")

(define_expand "divhf3"
  [(set (match_operand:HF 0 "register_operand" "")
	(div:HF (match_operand:HF 1 "register_operand" "")
		(match_operand:HF 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!dsp16xx_divhf3_libcall)
    dsp16xx_divhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHF3_LIBCALL);
  
  emit_library_call (dsp16xx_divhf3_libcall, 1, HFmode, 2,
		     operands[1], HFmode,
		     operands[2], HFmode);
  emit_move_insn (operands[0], hard_libcall_value(HFmode));
  DONE;
}")



;;
;; ********************
;;
;; Logical Instructions
;;

(define_insn "andhi3"
  [(set (match_operand:HI 0 "register_operand" "=A,A,?A")
        (and:HI (match_operand:HI 1 "register_operand" "%A,!A,A")
                (match_operand:HI 2 "nonmemory_operand" "Z,A,i")))]
  ""
  "@
   %0=%1&%2
   %0=%1&%2
   %0=%w1&%H2\;%0=%b0&%U2"
  [(set_attr "type" "f3_alu,f3_alu,f3_alu_i")])

(define_insn "andqi3"
  [(set (match_operand:QI 0 "register_operand" "=k,u,uk,!k,!u,j,q,jq,!j,!q")
	(and:QI (match_operand:QI 1 "register_operand" "uk,uk,uk,uk,uk,jq,jq,jq,jq,jq")
		(match_operand:QI 2 "nonmemory_operand" "wz,wz,i,uk,uk,yv,yv,i,jq,jq")))
	(clobber (match_scratch:QI 3 "=j,q,X,j,q,k,u,X,k,u"))]
   ""
   "@
    %m0=%m1&%m2
    %m0=%m1&%m2
    %m0=%1&%H2
    %m0=%m1&%m2
    %m0=%m1&%m2
    %m0=%m1&%m2
    %m0=%m1&%m2
    %m0=%b1&%H2
    %m0=%m1&%m2
    %m0=%m1&%m2")

(define_insn "iorhi3"
  [(set (match_operand:HI 0 "register_operand" "=A,A,A,?A")
        (ior:HI (match_operand:HI 1 "register_operand" "%A,!A,A,A")
                (match_operand:HI 2 "nonmemory_operand" "Z,A,I,i")))]
 ""
 "@
   %0=%u1|%u2
   %0=%u1|%u2
   %0=%w1|%H2
   %0=%w1|%H2\;%0=%b0|%U2"
  [(set_attr "type" "f3_alu,f3_alu,f3_alu_i,f3_alu_i")])

(define_insn "iorqi3"
  [(set (match_operand:QI 0 "register_operand" "=k,u,uk,!k,!u,j,q,jq,!j,!q")
	(ior:QI (match_operand:QI 1 "register_operand" "uk,uk,uk,uk,uk,jq,jq,jq,jq,jq")
		(match_operand:QI 2 "nonmemory_operand" "wz,wz,i,uk,uk,yv,yv,i,jq,jq")))
	(clobber (match_scratch:QI 3 "=j,q,X,j,q,k,u,X,k,u"))]
   ""
   "@
    %m0=%m1|%m2
    %m0=%m1|%m2
    %m0=%1|%H2
    %m0=%m1|%m2
    %m0=%m1|%m2
    %m0=%m1|%m2
    %m0=%m1|%m2
    %m0=%b1|%H2
    %m0=%m1|%m2
    %m0=%m1|%m2")

(define_insn "xorhi3"
  [(set (match_operand:HI 0 "register_operand" "=A,A,A,?A")
        (xor:HI (match_operand:HI 1 "register_operand" "%A,!A,A,A")
                (match_operand:HI 2 "nonmemory_operand" "Z,A,I,i")))]
  ""
  "@
   %0=%1^%2
   %0=%1^%2
   %0=%w1^%H2
   %0=%w1^%H2\;%0=%b0^%U2"
  [(set_attr "type" "f3_alu,f3_alu,f3_alu_i,f3_alu_i")])

(define_insn "xorqi3"
  [(set (match_operand:QI 0 "register_operand" "=k,u,uk,!k,!u,j,q,jq,!j,!q")
	(xor:QI (match_operand:QI 1 "register_operand" "uk,uk,uk,uk,uk,jq,jq,jq,jq,jq")
		(match_operand:QI 2 "nonmemory_operand" "wz,wz,i,uk,uk,yv,yv,i,jq,jq")))
	(clobber (match_scratch:QI 3 "=j,q,X,j,q,k,u,X,k,u"))]
   ""
   "@
    %m0=%m1^%m2
    %m0=%m1^%m2
    %m0=%1^%H2
    %m0=%m1^%m2
    %m0=%m1^%m2
    %m0=%m1^%m2
    %m0=%m1^%m2
    %m0=%b1^%H2
    %m0=%m1^%m2
    %m0=%m1^%m2")

(define_insn "one_cmplhi2"
  [(set (match_operand:HI 0 "register_operand" "=A")
        (not:HI (match_operand:HI 1 "register_operand" "A")))]
  ""
  "%0= ~%1"
  [(set_attr "type" "special")])

(define_insn "one_cmplqi2"
  [(set (match_operand:QI 0 "register_operand" "=ku,jq")
        (not:QI (match_operand:QI 1 "register_operand" "ku,jq")))]
  ""
  "@
   %m0= %1 ^ 0xffff
   %m0= %b1 ^ 0xffff"
  [(set_attr "type" "special")])


;;
;; MOVE INSTRUCTIONS
;;

(define_expand "movhi"
  [(set (match_operand:HI 0 "general_operand" "")
	(match_operand:HI 1 "general_operand" ""))]
  ""
  "
{
  if (emit_move_sequence (operands, HImode))
    DONE;
}")


(define_insn "match_movhi1"
  [(set (match_operand:HI 0 "nonimmediate_operand"  "=A,Z,A,d,d,m,?d,*Y,t,f")
	(match_operand:HI 1 "general_operand"        "d,A,K,i,m,d,*Y,?d,t,f"))]
  "register_operand(operands[0], HImode)
   || register_operand(operands[1], HImode)"
  "*
{
	switch (which_alternative)
        {
		/* register to accumulator */
		case 0:
 		   return \"%0=%1\";
		case 1:
		   return \"%u0=%u1\;%w0=%w1\";
	        case 2:
	           return \"%0=%0^%0\";
		case 3:
		     return \"%u0=%U1\;%w0=%H1\";
		case 4:
		   double_reg_from_memory(operands);
		   return \"\";
		case 5:
		   double_reg_to_memory(operands);
		   return \"\";
		case 6:
		case 7:
		   return \"%u0=%u1\;%w0=%w1\";
		case 8:
		case 9:
		   return \"\";
        }
}"
[(set_attr "type" "move,move,load_i,load_i,load,store,load,store,move,move")])


;; NOTE: It is cheaper to do 'y = *r0', than 'r0 = *r0'.

(define_expand "movqi"
  [(set (match_operand:QI 0 "nonimmediate_operand" "")
	(match_operand:QI 1 "general_operand" ""))]
  ""
  "
{
  if (emit_move_sequence (operands, QImode))
    DONE;
}")

;; The movqi pattern with the parallel is used for addqi insns (which have a parallel)
;; that are turned into moveqi insns by the flow phase. This happens when a auto-increment
;; is detected.

(define_insn "match_movqi1"
  [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "=A,r,aW,c,?D,m<>,e,Y,r,xyz,m<>")
		   (match_operand:QI 1 "general_operand"       "r,A,J,i,m<>,D,Y,e,0,m<>,xyz"))
	      (clobber (match_scratch:QI 2 "=X,X,X,X,X,X,X,X,X,X,X"))])]
  "register_operand(operands[0], QImode)
   || register_operand(operands[1], QImode)"
  "*
{
	switch (which_alternative)
	{
		case 0:
		   /* We have to use the move mnemonic otherwise the 1610 will
		      attempt to transfer all 32-bits of 'y', 'p' or an accumulator
		      , which we don't want */
		   if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
			|| IS_ACCUM_REG(REGNO(operands[1])))
		       return \"move %0=%1\";
		   else
		       return \"%0=%1\";

		case 1:
 		   return \"%0=%1\";

		case 2:
		   return \"set %0=%H1\";

		case 3:
                   return \"%0=%H1\";

		case 4:
		   return \"%0=%1\";

		case 5:
		case 6:
                   return \"%0=%1\";

		case 7:
		   return \"%0=%1\";

		case 8:
		   return \"\";

                case 9: case 10:
		   return \"%0=%1\";
	}
}")

(define_insn "match_movqi2"
  [(set (match_operand:QI 0 "nonimmediate_operand" "=A,r,aW,c,?D,m<>,e,Y,r,xyz,m<>")
	(match_operand:QI 1 "general_operand"       "r,A,J,i,m<>,D,Y,e,0,m<>,xyz"))]
  "register_operand(operands[0], QImode)
   || register_operand(operands[1], QImode)"
  "*
{
	switch (which_alternative)
	{
		case 0:
		   /* We have to use the move mnemonic otherwise the 1610 will
		      attempt to transfer all 32-bits of 'y', 'p' or an accumulator
		      , which we don't want */
		   if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
			|| IS_ACCUM_REG(REGNO(operands[1])))
		       return \"move %0=%1\";
		   else
		       return \"%0=%1\";

		case 1:
 		   return \"%0=%1\";

		case 2:
		   return \"set %0=%H1\";

		case 3:
                   return \"%0=%H1\";

		case 4:
		   return \"%0=%1\";

		case 5:
		case 6:
                   return \"%0=%1\";

		case 7:
		   return \"%0=%1\";

		case 8:
		   return \"\";

                case 9: case 10:
		   return \"%0=%1\";
	}
}")

(define_expand "reload_inqi"
  [(set (match_operand:QI 0 "register_operand" "=u")
        (match_operand:QI 1 "sp_operand" ""))
   (clobber (match_operand:QI 2 "register_operand" "=&q"))]
  ""
  "
{
  rtx addr_reg = XEXP (operands[1], 0);
  rtx offset = XEXP (operands[1], 1);

  /* First, move the frame or stack pointer to the accumulator */
  emit_move_insn (operands[0], addr_reg);

  /* Then generate the add insn */
  emit_insn (gen_rtx (PARALLEL, VOIDmode, 
		      gen_rtvec (2,
				 gen_rtx (SET, VOIDmode, operands[0], 
					  gen_rtx (PLUS, QImode, operands[0], offset)),
				 gen_rtx (CLOBBER, VOIDmode, operands[2]))));
  DONE;
}")

(define_expand "reload_inhi"
  [(set (match_operand:HI 0 "register_operand" "=r")
        (match_operand:HI 1 "register_operand" "r"))
   (clobber (match_operand:QI 2 "register_operand" "=&h"))]
  ""
  "
{
  /* Check for an overlap of operand 2 (an accumulator) with
     the msw of operand 0. If we have an overlap we must reverse
     the order of the moves. */

  if (REGNO(operands[2]) == REGNO(operands[0]))
    {
      emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HImode));
      emit_move_insn (operand_subword (operands[0], 1, 0, HImode), operands[2]);
      emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HImode));
      emit_move_insn (operand_subword (operands[0], 0, 0, HImode), operands[2]);
    }
  else
    {
      emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HImode));
      emit_move_insn (operand_subword (operands[0], 0, 0, HImode), operands[2]);
      emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HImode));
      emit_move_insn (operand_subword (operands[0], 1, 0, HImode), operands[2]);
    }

  DONE;