📄 1750a.h
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#define CAN_ELIMINATE(FROM, TO) 1#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ OFFSET = (TO == STACK_POINTER_REGNUM) ? -1 : 0/* Output assembler code for a block containing the constant parts of a trampoline, leaving space for the variable parts. */#define TRAMPOLINE_TEMPLATE(FILE) fprintf(FILE,"TRAMPOLINE_TEMPLATE called\n")/* Length in units of the trampoline for entering a nested function. */#define TRAMPOLINE_SIZE 2/* Emit RTL insns to initialize the variable parts of a trampoline. FNADDR is an RTX for the address of the function's pure code. CXT is an RTX for the static chain value for the function. */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) printf("INITIALIZE_TRAMPO called\n")/* { \ emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 1)), CXT); \ emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 6)), FNADDR); \} *//*****************************************************************************//* Addressing modes, and classification of registers for them. *//* 1750 doesn't have a lot of auto-incr./decr. - just for the stack ptr. *//* #define HAVE_POST_INCREMENT 0 just for R15 (stack pointer) *//* #define HAVE_POST_DECREMENT 0 *//* #define HAVE_PRE_DECREMENT 0 just for R15 (stack pointer) *//* #define HAVE_PRE_INCREMENT 0 *//* Macros to check register numbers against specific register classes. *//* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo reg currently allocated to a suitable hard reg. Since they use reg_renumber, they are safe only once reg_renumber has been allocated, which happens in local-alloc.c. 1750 note: The words BASE and INDEX are used in their GCC senses: The "Index Registers", R12 through R15, are used in the 1750 instructions LB,STB,AB,SBB,MB,DB,LBX,STBX,... */#define REGNO_OK_FOR_BASE_P(REGNO) \ ((REGNO) > 0 && (REGNO) <= 15 || \ reg_renumber[REGNO] > 0 && reg_renumber[REGNO] <= 15)#define REGNO_OK_FOR_INDEX_P(REGNO) \ ((REGNO) >= 12 && (REGNO) <= 15 || \ reg_renumber[REGNO] >= 12 && reg_renumber[REGNO] <= 15)/* Now macros that check whether X is a register and also, strictly, whether it is in a specified class. *//* 1 if X is an address register */#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))/* Maximum number of registers that can appear in a valid memory address. */#define MAX_REGS_PER_ADDRESS 1/* Recognize any constant value that is a valid address. */#define CONSTANT_ADDRESS_P(X) CONSTANT_P(X)/* Nonzero if the constant value X is a legitimate general operand. It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */#define LEGITIMATE_CONSTANT_P(X) 1/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. */#ifdef REG_OK_STRICT/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))#else/* Nonzero if X is a hard reg that can be used as an index or if it is a pseudo reg. */#define REG_OK_FOR_INDEX_P(X) (REGNO (X) >= 12)/* Nonzero if X is a hard reg that can be used as a base reg or if it is a pseudo reg. */#define REG_OK_FOR_BASE_P(X) (REGNO (X) > 0)#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. 1750 note: Currently we don't implement address expressions that use GCC "Index"-class regs. To be expanded to handle the 1750 "Base with Index" instructions (see also MAX_REGS_PER_ADDRESS and others). */#define GO_IF_BASED_ADDRESS(X, ADDR) { \ if ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P(X))) \ goto ADDR; \ if (GET_CODE (X) == PLUS) \ { register rtx x0 = XEXP(X,0), x1 = XEXP(X,1); \ if ((REG_P(x0) && REG_OK_FOR_BASE_P(x0) && CONSTANT_ADDRESS_P(x1)) \ || (REG_P(x1) && REG_OK_FOR_BASE_P(x1) && CONSTANT_ADDRESS_P(x0))) \ goto ADDR; } }#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) { \ if (CONSTANT_ADDRESS_P(X)) goto ADDR; \ GO_IF_BASED_ADDRESS(X,ADDR) }/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. */#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. On the 68000, only predecrement and postincrement address depend thus (the amount of decrement or increment being the length of the operand). *//* 1750: not used. */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)/*****************************************************************************//* Specify the machine mode that this machine uses for the index in the tablejump instruction. */#define CASE_VECTOR_MODE QImode/* Define as C expression which evaluates to nonzero if the tablejump instruction expects the table to contain offsets from the address of the table. Do not define this if the table should contain absolute addresses. *//* #define CASE_VECTOR_PC_RELATIVE 1 *//* Specify the tree operation to be used to convert reals to integers. */#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR/* This is the kind of divide that is easiest to do in the general case. */#define EASY_DIV_EXPR TRUNC_DIV_EXPR/* Define this as 1 if `char' should by default be signed; else as 0. */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */#define MOVE_MAX 65536/* If a memory-to-memory move would take MOVE_RATIO or more simple move-instruction pairs, we will do a movstr or libcall instead. */#define MOVE_RATIO 4/* Define this if zero-extension is slow (more than one real instruction). *//* #define SLOW_ZERO_EXTEND *//* Nonzero if access to memory by bytes is slow and undesirable. */#define SLOW_BYTE_ACCESS 0/* Define if shifts truncate the shift count which implies one can omit a sign-extension or zero-extension of a shift count. *//* #define SHIFT_COUNT_TRUNCATED 1 *//* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* We assume that the store-condition-codes instructions store 0 for false and some other value for true. This is the value stored for true. */#define STORE_FLAG_VALUE 1/* When a prototype says `char' or `short', really pass an `int'. 1750: for now, `char' is 16 bits wide anyway. #define PROMOTE_PROTOTYPES *//* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */#define Pmode QImode/* A function address in a call instruction is a 16-bit address (for indexing purposes) */#define FUNCTION_MODE QImode/* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion of a switch statement. If the code is computed here, return it with a return statement. Otherwise, break from the switch. */#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ case CONST_INT: \ return (INTVAL(RTX) >= -16 && INTVAL(RTX) <= 16) ? 1 : 3; \ case CONST: \ case LABEL_REF: \ case SYMBOL_REF: \ return 3; \ case CONST_DOUBLE: \ return 4;#define ADDRESS_COST(ADDRESS) (memop_valid (ADDRESS) ? 3 : 10)#define REGISTER_MOVE_COST(FROM,TO) 2#define MEMORY_MOVE_COST(M,C,I) 4/* Tell final.c how to eliminate redundant test instructions. *//* Here we define machine-dependent flags and fields in cc_status (see `conditions.h'). *//* MIL-STD-1750: none -- just has the garden variety C,P,Z,N flags. *//* Store in cc_status the expressions that the condition codes will describe after execution of an instruction whose pattern is EXP. Do not alter them if the instruction would not alter the cc's. 1750: See file out-1750a.c for notice_update_cc(). */#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP)/**********************************************//* Produce debugging info in the DWARF format #define DWARF_DEBUGGING_INFO*//*****************************************************************************//* Control the assembler format that we output. *//* Output at beginning of assembler file. */#define ASM_FILE_START(FILE) { \ char *p, name[40]; \ if ((p = (char *)strrchr(main_input_filename,'/')) != NULL ? 1 : \ (p = (char *)strrchr(main_input_filename,']')) != NULL) \ p++; \ else \ p = main_input_filename; \ strcpy(name,p); \ if (p = (char *)strchr(name,'.')) \ *p = '\0'; \ fprintf(FILE,"\tname %s\n",name); \ fprintf(FILE,"\tnolist\n\tinclude \"ms1750.inc\"\n\tlist\n\n"); \ fprintf(FILE,"\tglobal\t__main\n\n"); }/* Output at end of assembler file. For 1750, we copy the data labels accrued in datalbl[] from the Constants section (Konst) to the Writable-Data section (Static). */#define ASM_FILE_END(FILE) \ do { \ if (datalbl_ndx >= 0) { \ int i, cum_size=0; \ fprintf(FILE,"\n\tstatic\ninit_srel\n"); \ for (i = 0; i <= datalbl_ndx; i++) { \ if (datalbl[i].name == NULL) \ { \ fprintf(stderr, "asm_file_end internal datalbl err\n"); \ exit (0); \ } \ fprintf(FILE,"%s \tblock %d\n", \ datalbl[i].name,datalbl[i].size); \ cum_size += datalbl[i].size; \ } \ fprintf(FILE,"\n\tinit\n"); \ fprintf(FILE,"\tlim\tr0,init_srel\n"); /* destin. */ \ fprintf(FILE,"\tlim\tr1,%d\n",cum_size); /* count */ \ fprintf(FILE,"\tlim\tr2,K%s\n",datalbl[0].name); /* source */ \ fprintf(FILE,"\tmov\tr0,r2\n"); \ fprintf(FILE,"\n\tnormal\n"); \ datalbl_ndx = -1; /* reset stuff */ \ for (i = 0; i < DATALBL_ARRSIZ; i++) \ datalbl[i].size = 0; \ } \ fprintf(FILE,"\n\tend\n"); \ } while (0)/* Output to assembler file text saying following lines may contain character constants, extra white space, comments, etc. */#define ASM_APP_ON "; ASM_APP_ON\n"/* Output to assembler file text saying following lines no longer contain unusual constructs. */#define ASM_APP_OFF "; ASM_APP_OFF\n"#define EXTRA_SECTIONS in_readonly_data#define EXTRA_SECTION_FUNCTIONS \ void const_section() \ { \ fprintf(asm_out_file,"\tkonst\n"); \ current_section = Konst; \ } \ check_section(sect) \ enum section sect; \ { \ if (current_section != sect) { \ fprintf(asm_out_file,"\t%s\n",sectname[(int)sect]); \ current_section = sect; \ } \ switch (sect) { \ case Init: \ case Normal: \
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