pdp11.h

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/* Definitions of target machine for GNU compiler, for the pdp-11
   Copyright (C) 1994, 1995, 1996, 1998, 1999 Free Software Foundation, Inc.
   Contributed by Michael K. Gschwind ([e-mail]).

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 1, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */


/* declarations */
int arith_operand ();
int const_immediate_operand ();
int expand_shift_operand ();
int legitimate_address_p ();
void notice_update_cc_on_set ();
void output_addr_const_pdp11 ();
void output_ascii ();
void output_function_epilogue ();
void output_function_prologue ();
char *output_jump();
char *output_move_double();
char *output_move_quad();
char *output_block_move();
void print_operand_address ();
int register_move_cost ();
int simple_memory_operand ();

/* check whether load_fpu_reg or not */
#define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
#define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
#define FPU_REG_P(x)	(LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
#define CPU_REG_P(x)	((x)<8)

/* Names to predefine in the preprocessor for this target machine.  */

#define CPP_PREDEFINES "-Dpdp11"

/* Print subsidiary information on the compiler version in use.  */
#define TARGET_VERSION fprintf (stderr, " (pdp11)");


/* Generate DBX debugging information.  */

/* #define DBX_DEBUGGING_INFO */

/* Run-time compilation parameters selecting different hardware subsets.
*/

extern int target_flags;

/* Macro to define tables used to set the flags.
   This is a list in braces of triplets in braces,
   each triplet being { "NAME", VALUE, DOC }
   where VALUE is the bits to set or minus the bits to clear and DOC
   is the documentation for --help (NULL if intentionally undocumented).
   An empty string NAME is used to identify the default VALUE.  */

#define TARGET_SWITCHES  \
{   { "fpu", 1, "Use hardware floating point" },		\
    { "soft-float", -1, "Do not use hardware floating point" }, \
/* return float result in ac0 */				\
    { "ac0", 2, "Return floating point results in ac0" },	\
    { "no-ac0", -2, "Return floating point results in memory" },\
/* is 11/40 */							\
    { "40", 4, "Generate code for an 11/40" },			\
    { "no-40", -4, "" },					\
/* is 11/45 */							\
    { "45", 8, "Generate code for an 11/45" },			\
    { "no-45", -8, "" },					\
/* is 11/10 */							\
    { "10", -12, "Generate code for an 11/10" },		\
/* use movstrhi for bcopy */					\
    { "bcopy", 16, NULL },					\
    { "bcopy-builtin", -16, NULL },				\
/* use 32 bit for int */					\
    { "int32", 32, "Use 32 bit int" },				\
    { "no-int16", 32, "Use 32 bit int" },			\
    { "int16", -32, "Use 16 bit int" },				\
    { "no-int32", -32, "Use 16 bit int" },			\
/* use 32 bit for float */					\
    { "float32", 64, "Use 32 bit float" },			\
    { "no-float64", 64, "Use 32 bit float" },			\
    { "float64", -64, "Use 64 bit float" },			\
    { "no-float32", -64, "Use 64 bit float" },			\
/* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
    { "abshi", 128, NULL },					\
    { "no-abshi", -128, NULL },					\
/* is branching expensive - on a PDP, it's actually really cheap */ \
/* this is just to play around and check what code gcc generates */ \
    { "branch-expensive", 256, NULL }, 				\
    { "branch-cheap", -256, NULL },				\
/* split instruction and data memory? */ 			\
    { "split", 1024, "Target has split I&D" },			\
    { "no-split", -1024, "Target does not have split I&D" },	\
/* UNIX assembler syntax?  */					\
    { "unix-asm", 2048, "Use UNIX assembler syntax" },		\
    { "dec-asm", -2048, "Use DEC assembler syntax" },		\
/* default */			\
    { "", TARGET_DEFAULT, NULL}	\
}

#define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)

#define TARGET_FPU 		(target_flags & 1)
#define TARGET_SOFT_FLOAT 	(!TARGET_FPU)

#define TARGET_AC0		((target_flags & 2) && TARGET_FPU)
#define TARGET_NO_AC0		(! TARGET_AC0)

#define TARGET_45		(target_flags & 8)
#define TARGET_40_PLUS		((target_flags & 4) || (target_flags & 8))
#define TARGET_10		(! TARGET_40_PLUS)

#define TARGET_BCOPY_BUILTIN	(! (target_flags & 16))

#define TARGET_INT16		(! TARGET_INT32)
#define TARGET_INT32		(target_flags & 32)

#define TARGET_FLOAT32		(target_flags & 64)
#define TARGET_FLOAT64		(! TARGET_FLOAT32)

#define TARGET_ABSHI_BUILTIN	(target_flags & 128)

#define TARGET_BRANCH_EXPENSIVE	(target_flags & 256)
#define TARGET_BRANCH_CHEAP 	(!TARGET_BRANCH_EXPENSIVE)

#define TARGET_SPLIT		(target_flags & 1024)
#define TARGET_NOSPLIT		(! TARGET_SPLIT)

#define TARGET_UNIX_ASM		(target_flags & 2048)
#define TARGET_UNIX_ASM_DEFAULT	0

#define ASSEMBLER_DIALECT	(TARGET_UNIX_ASM ? 1 : 0)



/* TYPE SIZES */
#define CHAR_TYPE_SIZE		8
#define SHORT_TYPE_SIZE		16
#define INT_TYPE_SIZE		(TARGET_INT16 ? 16 : 32)
#define LONG_TYPE_SIZE		32
#define LONG_LONG_TYPE_SIZE	64     

/* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit 
   of saving core for huge arrays - the definitions are 
   already in md - but floats can never reside in 
   an FPU register - we keep the FPU in double float mode 
   all the time !! */
#define FLOAT_TYPE_SIZE		(TARGET_FLOAT32 ? 32 : 64)
#define DOUBLE_TYPE_SIZE	64
#define LONG_DOUBLE_TYPE_SIZE	64

/* machine types from ansi */
#define SIZE_TYPE "unsigned int" 	/* definition of size_t */

/* is used in cexp.y - we don't have target_flags there, 
   so just give default definition 

   hope it does not come back to haunt us! */
#define WCHAR_TYPE "int" 		/* or long int???? */
#define WCHAR_TYPE_SIZE 16

#define PTRDIFF_TYPE "int"

/* target machine storage layout */

/* Define this if most significant bit is lowest numbered
   in instructions that operate on numbered bit-fields.  */
#define BITS_BIG_ENDIAN 0

/* Define this if most significant byte of a word is the lowest numbered.  */
#define BYTES_BIG_ENDIAN 0

/* Define this if most significant word of a multiword number is numbered.  */
#define WORDS_BIG_ENDIAN 1

/* number of bits in an addressable storage unit */
#define BITS_PER_UNIT 8

/* Width in bits of a "word", which is the contents of a machine register.
   Note that this is not necessarily the width of data type `int';
   if using 16-bit ints on a 68000, this would still be 32.
   But on a machine with 16-bit registers, this would be 16.  */
/*  This is a machine with 16-bit registers */
#define BITS_PER_WORD 16

/* Width of a word, in units (bytes). 

   UNITS OR BYTES - seems like units */
#define UNITS_PER_WORD 2

/* Maximum sized of reasonable data type 
   DImode or Dfmode ...*/
#define MAX_FIXED_MODE_SIZE 64	

/* Width in bits of a pointer.
   See also the macro `Pmode' defined below.  */
#define POINTER_SIZE 16

/* Allocation boundary (in *bits*) for storing pointers in memory.  */
#define POINTER_BOUNDARY 16

/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
#define PARM_BOUNDARY 16

/* Allocation boundary (in *bits*) for the code of a function.  */
#define FUNCTION_BOUNDARY 16

/* Alignment of field after `int : 0' in a structure.  */
#define EMPTY_FIELD_BOUNDARY 16

/* No data type wants to be aligned rounder than this.  */
#define BIGGEST_ALIGNMENT 16

/* Define this if move instructions will actually fail to work
   when given unaligned data.  */
#define STRICT_ALIGNMENT 1

/* Standard register usage.  */

/* Number of actual hardware registers.
   The hardware registers are assigned numbers for the compiler
   from 0 to just below FIRST_PSEUDO_REGISTER.
   All registers that the compiler knows about must be given numbers,
   even those that are not normally considered general registers.

   we have 8 integer registers, plus 6 float 
   (don't use scratch float !) */

#define FIRST_PSEUDO_REGISTER 14

/* 1 for registers that have pervasive standard uses
   and are not available for the register allocator.

   On the pdp, these are:
   Reg 7	= pc;
   reg 6	= sp;
   reg 5	= fp;  not necessarily! 
*/

/* don't let them touch fp regs for the time being !*/

#define FIXED_REGISTERS  \
{0, 0, 0, 0, 0, 0, 1, 1, \
 0, 0, 0, 0, 0, 0     }



/* 1 for registers not available across function calls.
   These must include the FIXED_REGISTERS and also any
   registers that can be used without being saved.
   The latter must include the registers where values are returned
   and the register where structure-value addresses are passed.
   Aside from that, you can include as many other registers as you like.  */

/* don't know about fp */
#define CALL_USED_REGISTERS  \
{1, 1, 0, 0, 0, 0, 1, 1, \
 0, 0, 0, 0, 0, 0 }


/* Make sure everything's fine if we *don't* have an FPU.
   This assumes that putting a register in fixed_regs will keep the
   compiler's mitts completely off it.  We don't bother to zero it out
   of register classes.  Also fix incompatible register naming with
   the UNIX assembler.
*/
#define CONDITIONAL_REGISTER_USAGE \
{ 						\
  int i; 					\
  HARD_REG_SET x; 				\
  if (!TARGET_FPU)				\
    { 						\
      COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
       if (TEST_HARD_REG_BIT (x, i)) 		\
	fixed_regs[i] = call_used_regs[i] = 1; 	\
    } 						\
						\
  if (TARGET_AC0)				\
      call_used_regs[8] = 1;			\
  if (TARGET_UNIX_ASM)				\
    {						\
      /* Change names of FPU registers for the UNIX assembler.  */ \
      reg_names[8] = "fr0";			\
      reg_names[9] = "fr1";			\
      reg_names[10] = "fr2";			\
      reg_names[11] = "fr3";			\
      reg_names[12] = "fr4";			\
      reg_names[13] = "fr5";			\
    }						\
}

/* Return number of consecutive hard regs needed starting at reg REGNO
   to hold something of mode MODE.
   This is ordinarily the length in words of a value of mode MODE
   but can be less for certain modes in special long registers.
*/

#define HARD_REGNO_NREGS(REGNO, MODE)   \
((REGNO < 8)?								\
    ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)	\
    :1)
    

/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
   On the pdp, the cpu registers can hold any mode - check alignment

   FPU can only hold DF - simplifies life!
*/
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
(((REGNO) < 8)?						\
  ((GET_MODE_BITSIZE(MODE) <= 16) 			\
   || (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1)))	\
  :(MODE) == DFmode)
    

/* Value is 1 if it is a good idea to tie two pseudo registers
   when one has mode MODE1 and one has mode MODE2.
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
   for any hard reg, then this must be 0 for correct output.  */
#define MODES_TIEABLE_P(MODE1, MODE2) 0

/* Specify the registers used for certain standard purposes.
   The values of these macros are register numbers.  */

/* the pdp11 pc overloaded on a register that the compiler knows about.  */
#define PC_REGNUM  7

/* Register to use for pushing function arguments.  */
#define STACK_POINTER_REGNUM 6

/* Base register for access to local variables of the function.  */
#define FRAME_POINTER_REGNUM 5

/* Value should be nonzero if functions must have frame pointers.
   Zero means the frame pointer need not be set up (and parms
   may be accessed via the stack pointer) in functions that seem suitable.
   This is computed in `reload', in reload1.c.
  */

#define FRAME_POINTER_REQUIRED 0