a29k.h

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/* Definitions of target machine for GNU compiler, for AMD Am29000 CPU.
   Copyright (C) 1988, 90-97, 1998 Free Software Foundation, Inc.
   Contributed by Richard Kenner ([e-mail])

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */


/* Names to predefine in the preprocessor for this target machine.  */

#define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI -Acpu(a29k) -Amachine(a29k)"

/* Print subsidiary information on the compiler version in use.  */
#define TARGET_VERSION

/* Pass -w to assembler.  */
#define ASM_SPEC "-w"

/* Run-time compilation parameters selecting different hardware subsets.  */

extern int target_flags;

/* Macro to define tables used to set the flags.
   This is a list in braces of pairs in braces,
   each pair being { "NAME", VALUE }
   where VALUE is the bits to set or minus the bits to clear.
   An empty string NAME is used to identify the default VALUE.  */

/* This means that the DW bit will be enabled, to allow direct loads
   of bytes.  */

#define TARGET_DW_ENABLE	(target_flags & 1)

/* This means that the external hardware does supports byte writes.  */

#define TARGET_BYTE_WRITES	(target_flags & 2)

/* This means that a "small memory model" has been selected where all
   function addresses are known to be within 256K.  This allows CALL to be
   used.  */

#define TARGET_SMALL_MEMORY	(target_flags & 4)

/* This means that we must always used on indirect call, even when
   calling a function in the same file, since the file might be > 256KB.  */

#define TARGET_LARGE_MEMORY	(target_flags & 8)

/* This means that we are compiling for a 29050.  */

#define TARGET_29050		(target_flags & 16)

/* This means that we are compiling for the kernel which means that we use
   gr64-gr95 instead of gr96-126.  */

#define TARGET_KERNEL_REGISTERS	(target_flags & 32)

/* This means that a call to "__msp_check" should be inserted after each stack
   adjustment to check for stack overflow.  */

#define TARGET_STACK_CHECK	(target_flags & 64)

/* This handles 29k processors which cannot handle the separation
   of a mtsrim insns and a storem insn (most 29000 chips to date, but
   not the 29050.  */

#define TARGET_NO_STOREM_BUG	(target_flags & 128)

/* This forces the compiler not to use incoming argument registers except
   for copying out arguments.  It helps detect problems when a function is
   called with fewer arguments than it is declared with.  */

#define TARGET_NO_REUSE_ARGS	(target_flags & 256)

/* This means that neither builtin nor emulated float operations are
   available, and that GCC should generate libcalls instead. */

#define TARGET_SOFT_FLOAT	(target_flags & 512)

/* This means that we should not emit the multm or mutmu instructions
   that some embedded systems' trap handlers don't support.  */

#define TARGET_MULTM		((target_flags & 1024) == 0)

#define TARGET_SWITCHES			\
  { {"dw", 1, "Generate code assuming DW bit is set"},			\
    {"ndw", -1, "Generate code assuming DW bit is not set"},		\
    {"bw", 2, "Generate code using byte writes"},			\
    {"nbw", - (1|2), "Do not generate byte writes"},			\
    {"small", 4, "Use small memory model"},				\
    {"normal", - (4|8), "Use normal memory model"},			\
    {"large", 8, "Use large memory model"},				\
    {"29050", 16+128, "Generate 29050 code"},				\
    {"29000", -16, "Generate 29000 code"},				\
    {"kernel-registers", 32, "Use kernel global registers"},		\
    {"user-registers", -32, "Use user global registers"},		\
    {"stack-check", 64, "Emit stack checking code"},			\
    {"no-stack-check", - 74, "Do not emit stack checking code"},	\
    {"storem-bug", -128, "Work around storem hardware bug"},		\
    {"no-storem-bug", 128, "Do not work around storem hardware bug"},	\
    {"reuse-arg-regs", -256, "Store locals in argument registers"},	\
    {"no-reuse-arg-regs", 256, "Do not store locals in arg registers"},	\
    {"soft-float", 512, "Use software floating point"},			\
    {"no-multm", 1024, "Do not generate multm instructions"},		\
    {"", TARGET_DEFAULT, NULL}}

#define TARGET_DEFAULT 3

/* Show we can debug even without a frame pointer.  */
#define CAN_DEBUG_WITHOUT_FP

/* target machine storage layout */

/* Define the types for size_t, ptrdiff_t, and wchar_t.  These are the
   same as those used by EPI.  The type for wchar_t does not make much
   sense, but is what is used.  */

#define SIZE_TYPE "unsigned int"
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "char"
#define WCHAR_TYPE_SIZE BITS_PER_UNIT

/* Define this macro if it is advisable to hold scalars in registers
   in a wider mode than that declared by the program.  In such cases, 
   the value is constrained to be within the bounds of the declared
   type, but kept valid in the wider mode.  The signedness of the
   extension may differ from that of the type.  */

#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
  if (GET_MODE_CLASS (MODE) == MODE_INT	\
      && GET_MODE_SIZE (MODE) < 4)  	\
    (MODE) = SImode;

/* Define this if most significant bit is lowest numbered
   in instructions that operate on numbered bit-fields.
   This is arbitrary on the 29k since it has no actual bit-field insns.
   It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE
   and we want to be able to convert BP position to bit position with
   just a shift.  */
#define BITS_BIG_ENDIAN 1

/* Define this if most significant byte of a word is the lowest numbered.
   This is true on 29k.  */
#define BYTES_BIG_ENDIAN 1

/* Define this if most significant word of a multiword number is lowest
   numbered. 

   For 29k we can decide arbitrarily since there are no machine instructions
   for them.  Might as well be consistent with bytes. */
#define WORDS_BIG_ENDIAN 1

/* number of bits in an addressable storage unit */
#define BITS_PER_UNIT 8

/* Width in bits of a "word", which is the contents of a machine register.
   Note that this is not necessarily the width of data type `int';
   if using 16-bit ints on a 68000, this would still be 32.
   But on a machine with 16-bit registers, this would be 16.  */
#define BITS_PER_WORD 32

/* Width of a word, in units (bytes).  */
#define UNITS_PER_WORD 4

/* Width in bits of a pointer.
   See also the macro `Pmode' defined below.  */
#define POINTER_SIZE 32

/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
#define PARM_BOUNDARY 32

/* Boundary (in *bits*) on which stack pointer should be aligned.  */
#define STACK_BOUNDARY 64

/* Allocation boundary (in *bits*) for the code of a function.  */
#define FUNCTION_BOUNDARY 32

/* Alignment of field after `int : 0' in a structure.  */
#define EMPTY_FIELD_BOUNDARY 32

/* Every structure's size must be a multiple of this.  */
#define STRUCTURE_SIZE_BOUNDARY 8

/* A bitfield declared as `int' forces `int' alignment for the struct.  */
#define PCC_BITFIELD_TYPE_MATTERS 1

/* No data type wants to be aligned rounder than this.  */
#define BIGGEST_ALIGNMENT 32

/* Make strings word-aligned so strcpy from constants will be faster.  */
#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
  (TREE_CODE (EXP) == STRING_CST	\
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

/* Make arrays of chars word-aligned for the same reasons.  */
#define DATA_ALIGNMENT(TYPE, ALIGN)		\
  (TREE_CODE (TYPE) == ARRAY_TYPE		\
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode	\
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

/* Set this non-zero if move instructions will actually fail to work
   when given unaligned data.  */
#define STRICT_ALIGNMENT 0

/* Set this non-zero if unaligned move instructions are extremely slow.

   On the 29k, they trap.  */
#define SLOW_UNALIGNED_ACCESS 1

/* Standard register usage.  */

/* Number of actual hardware registers.
   The hardware registers are assigned numbers for the compiler
   from 0 to just below FIRST_PSEUDO_REGISTER.
   All registers that the compiler knows about must be given numbers,
   even those that are not normally considered general registers.

   29k has 256 registers, of which 62 are not defined.  gr0 and gr1 are
   not produced in generated RTL so we can start at gr96, and call it
   register zero.

   So 0-31 are gr96-gr127, lr0-lr127 are 32-159.  To represent the input
   arguments, whose register numbers we won't know until we are done,
   use register 160-175.  They cannot be modified.  Similarly, 176 is used
   for the frame pointer.  It is assigned the last local register number
   once the number of registers used is known.

   We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q,
   respectively.  Registers 181 through 199 are used for the other special
   registers that may be used by the programmer, but are never used by the
   compiler.

   Registers 200-203 are the four floating-point accumulator register in
   the 29050.

   Registers 204-235 are the 32 global registers for kernel mode when
   -mkernel-registers is not specified, and the 32 global user registers
   when it is.

   When -mkernel-registers is specified, we still use the same register
   map but change the names so 0-31 print as gr64-gr95.  */

#define FIRST_PSEUDO_REGISTER 236

/* Because of the large number of registers on the 29k, we define macros
   to refer to each group of registers and then define the number for some
   registers used in the calling sequence.  */

#define R_GR(N)		((N) - 96)	/* gr96 is register number 0 */
#define R_LR(N)		((N) + 32)	/* lr0 is register number 32 */
#define R_FP		176		/* frame pointer is register 176 */
#define R_AR(N)		((N) + 160)	/* first incoming arg reg is 160 */
#define R_KR(N)		((N) + 204)	/* kernel registers (gr64 to gr95) */

/* Define the numbers of the special registers.  */
#define R_BP	177
#define R_FC	178
#define R_CR	179
#define R_Q	180

/* These special registers are not used by the compiler, but may be referenced
   by the programmer via asm declarations.  */

#define R_VAB	181
#define R_OPS	182
#define R_CPS	183
#define R_CFG	184
#define R_CHA	185
#define R_CHD	186
#define R_CHC	187
#define R_RBP	188
#define R_TMC	189
#define R_TMR	190
#define R_PC0	191
#define R_PC1	192
#define R_PC2	193
#define R_MMU	194
#define R_LRU	195
#define R_FPE	196
#define R_INT	197
#define R_FPS	198
#define R_EXO	199

/* Define the number for floating-point accumulator N.  */
#define R_ACU(N)	((N) + 200)

/* Now define the registers used in the calling sequence.  */
#define R_TAV	R_GR (121)
#define R_TPC	R_GR (122)
#define R_LRP	R_GR (123)
#define R_SLP	R_GR (124)
#define R_MSP	R_GR (125)
#define R_RAB	R_GR (126)
#define R_RFB	R_GR (127)

/* 1 for registers that have pervasive standard uses
   and are not available for the register allocator.  */

#define FIXED_REGISTERS  \
 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1,			  \
  0, 0, 0, 0,					  \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

/* 1 for registers not available across function calls.
   These must include the FIXED_REGISTERS and also any
   registers that can be used without being saved.
   The latter must include the registers where values are returned
   and the register where structure-value addresses are passed.