i386.md

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    {
      operands[1] = force_reg (SFmode, operands[1]);
    }

  /* If we are loading a floating point constant that isn't 0 or 1
     into a register, force the value to memory now, since we'll 
     get better code out the back end.  */
  else if ((reload_in_progress | reload_completed) == 0
	   && GET_CODE (operands[0]) != MEM
	   && GET_CODE (operands[1]) == CONST_DOUBLE
	   && !standard_80387_constant_p (operands[1]))
    {
      operands[1] = validize_mem (force_const_mem (SFmode, operands[1]));
    }
}")

;; For the purposes of regclass, prefer FLOAT_REGS.
(define_insn ""
  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,m,!*r,!m")
	(match_operand:SF 1 "general_operand" "fmG,f,*rmF,*rF"))]
  "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) || (GET_CODE (operands[1]) != MEM)"
  "*
{
  int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;

  /* First handle a `pop' insn or a `fld %st(0)' */

  if (STACK_TOP_P (operands[0]) && STACK_TOP_P (operands[1]))
    {
      if (stack_top_dies)
	return AS1 (fstp,%y0);
      else
        return AS1 (fld,%y0);
    }

  /* Handle other kinds of writes from the 387 */

  if (STACK_TOP_P (operands[1]))
    {
      if (stack_top_dies)
	return AS1 (fstp%z0,%y0);
      else
        return AS1 (fst%z0,%y0);
    }

  /* Handle other kinds of reads to the 387 */

  if (STACK_TOP_P (operands[0]) && GET_CODE (operands[1]) == CONST_DOUBLE)
    return output_move_const_single (operands);

  if (STACK_TOP_P (operands[0]))
    return AS1 (fld%z1,%y1);

  /* Handle all SFmode moves not involving the 387 */

  return singlemove_string (operands);
}"
  [(set_attr "type" "fld")])


(define_insn "swapsf"
  [(set (match_operand:SF 0 "register_operand" "f")
	(match_operand:SF 1 "register_operand" "f"))
   (set (match_dup 1)
	(match_dup 0))]
  ""
  "*
{
  if (STACK_TOP_P (operands[0]))
    return AS1 (fxch,%1);
  else
    return AS1 (fxch,%0);
}")


(define_insn "movdf_push"
  [(set (match_operand:DF 0 "push_operand" "=<,<")
	(match_operand:DF 1 "general_operand" "*rfF,o"))]
  "TARGET_PUSH_MEMORY || GET_CODE (operands[1]) != MEM 
   || reload_in_progress || reload_completed"
  "*
{
  if (STACK_REG_P (operands[1]))
    {
      rtx xops[3];

      xops[0] = AT_SP (DFmode);
      xops[1] = GEN_INT (8);
      xops[2] = stack_pointer_rtx;

      output_asm_insn (AS2 (sub%L2,%1,%2), xops);

      if (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
        output_asm_insn (AS1 (fstp%Q0,%0), xops);
      else
        output_asm_insn (AS1 (fst%Q0,%0), xops);

      RET;
    }

  if (which_alternative == 1)
    return output_move_pushmem (operands, insn, GET_MODE_SIZE (DFmode), 0, 0);

  return output_move_double (operands);
}")

(define_split
  [(set (match_operand:DF 0 "push_operand" "")
        (match_operand:DF 1 "register_operand" ""))]
  "reload_completed && STACK_REG_P (operands[1])"
  [(set (reg:SI 7)
        (minus:SI (reg:SI 7) (const_int 8)))
   (set (mem:DF (reg:SI 7))
        (match_dup 1))]
  "")

(define_expand "movdf"
  [(set (match_operand:DF 0 "general_operand" "")
	(match_operand:DF 1 "general_operand" ""))]
  ""
  "
{
  /* Don't generate memory->memory moves, go through a register */
  if (TARGET_MOVE
      && no_new_pseudos == 0
      && GET_CODE (operands[0]) == MEM
      && GET_CODE (operands[1]) == MEM)
    {
      operands[1] = force_reg (DFmode, operands[1]);
    }

  /* If we are loading a floating point constant that isn't 0 or 1 into a
     register, indicate we need the pic register loaded.  This could be
     optimized into stores of constants if the target eventually moves to
     memory, but better safe than sorry.  */
  else if ((reload_in_progress | reload_completed) == 0
	   && GET_CODE (operands[0]) != MEM
	   && GET_CODE (operands[1]) == CONST_DOUBLE
	   && !standard_80387_constant_p (operands[1]))
    {
      operands[1] = validize_mem (force_const_mem (DFmode, operands[1]));
    }
}")

;; For the purposes of regclass, prefer FLOAT_REGS.
(define_insn ""
  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,!*r,!o")
	(match_operand:DF 1 "general_operand" "fmG,f,*roF,*rF"))]
  "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM)
   || (GET_CODE (operands[1]) != MEM)"
  "*
{
  int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;

  /* First handle a `pop' insn or a `fld %st(0)' */

  if (STACK_TOP_P (operands[0]) && STACK_TOP_P (operands[1]))
    {
      if (stack_top_dies)
	return AS1 (fstp,%y0);
      else
        return AS1 (fld,%y0);
    }

  /* Handle other kinds of writes from the 387 */

  if (STACK_TOP_P (operands[1]))
    {
      if (stack_top_dies)
	return AS1 (fstp%z0,%y0);
      else
        return AS1 (fst%z0,%y0);
    }

  /* Handle other kinds of reads to the 387 */

  if (STACK_TOP_P (operands[0]) && GET_CODE (operands[1]) == CONST_DOUBLE)
    return output_move_const_single (operands);

  if (STACK_TOP_P (operands[0]))
    return AS1 (fld%z1,%y1);

  /* Handle all DFmode moves not involving the 387 */

  return output_move_double (operands);
}"
  [(set_attr "type" "fld")])



(define_insn "swapdf"
  [(set (match_operand:DF 0 "register_operand" "f")
	(match_operand:DF 1 "register_operand" "f"))
   (set (match_dup 1)
	(match_dup 0))]
  ""
  "*
{
  if (STACK_TOP_P (operands[0]))
    return AS1 (fxch,%1);
  else
    return AS1 (fxch,%0);
}")

(define_insn "movxf_push"
  [(set (match_operand:XF 0 "push_operand" "=<,<")
 	(match_operand:XF 1 "general_operand" "*rfF,o"))]
  "TARGET_PUSH_MEMORY || GET_CODE (operands[1]) != MEM 
   || reload_in_progress || reload_completed"
  "*
{
  if (STACK_REG_P (operands[1]))
    {
      rtx xops[3];

      xops[0] = AT_SP (XFmode);
      xops[1] = GEN_INT (12);
      xops[2] = stack_pointer_rtx;

      output_asm_insn (AS2 (sub%L2,%1,%2), xops);

      output_asm_insn (AS1 (fstp%T0,%0), xops);
      if (! find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
	output_asm_insn (AS1 (fld%T0,%0), xops);

      RET;
    }

  if (which_alternative == 1)
    return output_move_pushmem (operands, insn, GET_MODE_SIZE (XFmode), 0, 0);

  return output_move_double (operands);
 }")

(define_split
  [(set (match_operand:XF 0 "push_operand" "")
        (match_operand:XF 1 "register_operand" ""))]
  "reload_completed && STACK_REG_P (operands[1])"
  [(set (reg:SI 7)
        (minus:SI (reg:SI 7) (const_int 12)))
   (set (mem:XF (reg:SI 7))
        (match_dup 1))]
  "")

(define_expand "movxf"
  [(set (match_operand:XF 0 "general_operand" "")
	(match_operand:XF 1 "general_operand" ""))]
  ""
  "
{
  /* Don't generate memory->memory moves, go through a register */
  if (TARGET_MOVE
      && no_new_pseudos == 0
      && GET_CODE (operands[0]) == MEM
      && GET_CODE (operands[1]) == MEM)
    {
      operands[1] = force_reg (XFmode, operands[1]);
    }

  /* If we are loading a floating point constant that isn't 0 or 1
     into a register, indicate we need the pic register loaded.  This could
     be optimized into stores of constants if the target eventually moves
     to memory, but better safe than sorry.  */
  else if ((reload_in_progress | reload_completed) == 0
	   && GET_CODE (operands[0]) != MEM
	   && GET_CODE (operands[1]) == CONST_DOUBLE
	   && !standard_80387_constant_p (operands[1]))
    {
      operands[1] = validize_mem (force_const_mem (XFmode, operands[1]));
    }
}")


(define_insn ""
  [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,!*r,!o")
	(match_operand:XF 1 "general_operand" "fmG,f,*roF,*rF"))]
  "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM)
   || (GET_CODE (operands[1]) != MEM)"
  "*
{
  int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;

  /* First handle a `pop' insn or a `fld %st(0)' */

  if (STACK_TOP_P (operands[0]) && STACK_TOP_P (operands[1]))
    {
      if (stack_top_dies)
	return AS1 (fstp,%y0);
      else
        return AS1 (fld,%y0);
    }

  /* Handle other kinds of writes from the 387 */

  if (STACK_TOP_P (operands[1]))
    {
      output_asm_insn (AS1 (fstp%z0,%y0), operands);
      if (! stack_top_dies)
	return AS1 (fld%z0,%y0);

      RET;
    }

  /* Handle other kinds of reads to the 387 */

  if (STACK_TOP_P (operands[0]) && GET_CODE (operands[1]) == CONST_DOUBLE)
    return output_move_const_single (operands);

  if (STACK_TOP_P (operands[0]))
       return AS1 (fld%z1,%y1);

  /* Handle all XFmode moves not involving the 387 */

  return output_move_double (operands);
}")

(define_insn "swapxf" 
  [(set (match_operand:XF 0 "register_operand" "f")
	(match_operand:XF 1 "register_operand" "f"))
   (set (match_dup 1)
	(match_dup 0))]
  ""
  "*
{
  if (STACK_TOP_P (operands[0]))
    return AS1 (fxch,%1);
  else
    return AS1 (fxch,%0);
}")

(define_insn ""
  [(set (match_operand:DI 0 "push_operand" "=<")
	(match_operand:DI 1 "general_operand" "riF"))]
  ""
  "* return output_move_double (operands);")

(define_insn ""
  [(set (match_operand:DI 0 "push_operand" "=<")
	(match_operand:DI 1 "memory_operand" "o"))]
  "TARGET_PUSH_MEMORY"
  "* return output_move_pushmem (operands, insn, GET_MODE_SIZE (DImode),0,0);")

(define_expand "movdi"
  [(set (match_operand:DI 0 "general_operand" "")
	(match_operand:DI 1 "general_operand" ""))]
  ""
  "
{
  /* Don't generate memory->memory moves, go through a register */
  if (TARGET_MOVE
      && no_new_pseudos == 0
      && GET_CODE (operands[0]) == MEM
      && GET_CODE (operands[1]) == MEM)
    {
      operands[1] = force_reg (DImode, operands[1]);
    }
}")

(define_insn ""
  [(set (match_operand:DI 0 "general_operand" "=g,r")
	(match_operand:DI 1 "general_operand" "riF,m"))]
  "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM)
   || (GET_CODE (operands[1]) != MEM)"
  "* return output_move_double (operands);"
  [(set_attr "type" "integer,memory")
   (set_attr "memory" "*,load")])

(define_split
  [(set (match_operand:DI 0 "nonimmediate_operand" "")
	(match_operand:DI 1 "general_operand" ""))]
  "reload_completed
   && (offsettable_memref_p (operands[0])
       || nonmemory_operand (operands[0], DImode))
   && (offsettable_memref_p (operands[1])
       || nonmemory_operand (operands[1], DImode))
   && (! reg_overlap_mentioned_p (gen_lowpart (SImode, operands[0]),
				  operands[1])
       || ! reg_overlap_mentioned_p (gen_highpart (SImode, operands[0]),
				     operands[1]))"
  [(set (match_dup 2)
	(match_dup 4))
   (set (match_dup 3)
	(match_dup 5))]
  "
{
  split_di (&operands[0], 1, &operands[2], &operands[3]);
  split_di (&operands[1], 1, &operands[4], &operands[5]);

  if (reg_overlap_mentioned_p (operands[2], operands[1]))
    {
    rtx tmp;

    tmp = operands[2];
    operands[2] = operands[3];
    operands[3] = tmp;

    tmp = operands[4];
    operands[4] = operands[5];
    operands[5] = tmp;
    }
}")

;;- conversion instructions
;;- NONE

;;- zero extension instructions
;; See comments by `andsi' for when andl is faster than movzx.

(define_expand "zero_extendhisi2"
  [(set (match_operand:SI 0 "register_operand" "")
	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
  ""
  "")

;; When optimizing for the PPro/PII or code size, always use movzwl.
;; We want to use a different pattern so we can use different constraints
;; than the generic pattern.
(define_insn ""
  [(set (match_operand:SI 0 "register_operand" "=r")
	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "rm")))]
  "(optimize_size || (int)ix86_cpu == (int)PROCESSOR_PENTIUMPRO)"
  "* return AS2 (movz%W0%L0,%1,%0);")

(define_insn ""
  [(set (match_operand:SI 0 "register_operand" "=r,&r,?r")
	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,rm,rm")))]
  "! (optimize_size || (int)ix86_cpu == (int)PROCESSOR_PENTIUMPRO)"
  "*
  {
  rtx xops[2];

  if ((TARGET_ZERO_EXTEND_WITH_AND || REGNO (operands[0]) == 0) 
      && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
    {
      xops[0] = operands[0];
      xops[1] = GEN_INT (0xffff);
      output_asm_insn (AS2 (and%L0,%1,%k0), xops);
      RET;
    }
  if (TARGET_ZERO_EXTEND_WITH_AND && !reg_overlap_mentioned_p (operands[0], operands[1]))
    {
      output_asm_insn (AS2 (xor%L0,%0,%0),operands);
      output_asm_insn (AS2 (mov%W0,%1,%w0),operands);
      RET;
    }