tahoe.md

gcc编译工具没有什么特别

(define_insn "call"
  [(call (match_operand:QI 0 "memory_operand" "m")
	 (match_operand:QI 1 "general_operand" "g"))]
  ""
  "*
{
  operands[1] = GEN_INT ((INTVAL (operands[1]) + 4));
  if (GET_CODE(operands[0]) == MEM
      && CONSTANT_ADDRESS_P (XEXP(operands[0], 0))
      && INTVAL (operands[1]) < 64)
    return \"callf %1,%0\"; /* this is much faster */   
  return \"calls %1,%0\";
}")

; gcc does not account for register mask/argc longword.  Thus the number
; for the call = number bytes for args + 4

(define_insn "call_value"
  [(set (match_operand 0 "" "=g")
	(call (match_operand:QI 1 "memory_operand" "m")
	      (match_operand:QI 2 "general_operand" "g")))]
  ""
  "*
{
  operands[2] = GEN_INT ((INTVAL (operands[2]) + 4));
  if (GET_CODE(operands[1]) == MEM
      && CONSTANT_ADDRESS_P (XEXP(operands[1], 0))
      && INTVAL (operands[2]) < 64)
    return \"callf %2,%1\"; /* this is much faster */   
  return \"calls %2,%1\";
}")


(define_insn "return"
  [(return)]
  ""
  "ret")

(define_insn "nop"
  [(const_int 0)]
  ""
  "nop")

; casesi this code extracted from the vax code.  The instructions are
; very similar.  Tahoe requires that the table be word aligned.  GCC
; places the table immediately after, thus the alignment directive.

(define_insn "casesi"
  [(set (pc)
	(if_then_else (le (minus:SI (match_operand:SI 0 "general_operand" "g")
				    (match_operand:SI 1 "general_operand" "g"))
			  (match_operand:SI 2 "general_operand" "g"))
		      (plus:SI (sign_extend:SI
				(mem:HI (plus:SI (pc)
						 (minus:SI (match_dup 0)
							   (match_dup 1)))))
			       (label_ref:SI (match_operand 3 "" "")))
		      (pc)))]
  ""
  "casel %0,%1,%2\;.align %@")


(define_insn "jump"
  [(set (pc)
	(label_ref (match_operand 0 "" "")))]
  ""
  "jbr %l0")


;; This is the list of all the non-standard insn patterns


; This is used to access the address of a byte.  This is similar to
; movqi, but the second operand had to be "address_operand" type, so
; it had to be an unnamed one.

(define_insn ""
  [(set (match_operand:SI 0 "general_operand" "=g")
	(match_operand:QI 1 "address_operand" "p"))]
  ""
  "*
{
  if (push_operand (operands[0], SImode))
    return \"pushab %a1\";
  return \"movab %a1,%0\";
}")

; This is used to access the address of a word.  This is similar to
; movhi, but the second operand had to be "address_operand" type, so
; it had to be an unnamed one.

(define_insn ""
  [(set (match_operand:SI 0 "general_operand" "=g")
	(match_operand:HI 1 "address_operand" "p"))]
  ""
  "*
{
  if (push_operand (operands[0], SImode))
    return \"pushaw %a1\";
  return \"movaw %a1,%0\";
}")

; This is used to access the address of a long.  This is similar to
; movsi, but the second operand had to be "address_operand" type, so
; it had to be an unnamed one.

(define_insn ""
  [(set (match_operand:SI 0 "general_operand" "=g")
	(match_operand:SI 1 "address_operand" "p"))]
  ""
  "*
{
  if (push_operand (operands[0], SImode))
    return \"pushal %a1\";
  return \"moval %a1,%0\";
}")


; bit test longword instruction, same as vax

(define_insn ""
  [(set (cc0)
	(and:SI (match_operand:SI 0 "general_operand" "g")
		(match_operand:SI 1 "general_operand" "g")))]
  ""
  "bitl %0,%1")


; bit test word instructions, same as vax

(define_insn ""
  [(set (cc0)
	(and:HI (match_operand:HI 0 "general_operand" "g")
		(match_operand:HI 1 "general_operand" "g")))]
  ""
  "bitw %0,%1")


; bit test instructions, same as vax

(define_insn ""
  [(set (cc0)
	(and:QI (match_operand:QI 0 "general_operand" "g")
		(match_operand:QI 1 "general_operand" "g")))]
  ""
  "bitb %0,%1")


; bne counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (eq (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jneq %l0")


; beq counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (ne (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jeql %l0")


; ble counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (gt (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jleq %l0")


; bleu counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (gtu (cc0)
			   (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jlequ %l0")


; bge counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (lt (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jgeq %l0")


; bgeu counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (ltu (cc0)
			   (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jgequ %l0")


; blt counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (ge (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jlss %l0")


; bltu counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (geu (cc0)
			   (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jlssu %l0")


; bgt counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (le (cc0)
			  (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jgtr %l0")


; bgtu counterpart.  in case gcc reverses the conditional.

(define_insn ""
  [(set (pc)
	(if_then_else (leu (cc0)
			   (const_int 0))
		      (pc)
		      (label_ref (match_operand 0 "" ""))))]
  ""
  "jgtru %l0")


; casesi alternate form as found in vax code.  this form is to
; compensate for the table's offset being no distance (0 displacement)

(define_insn ""
  [(set (pc)
	(if_then_else (le (match_operand:SI 0 "general_operand" "g")
			  (match_operand:SI 1 "general_operand" "g"))
		      (plus:SI (sign_extend:SI
				(mem:HI (plus:SI (pc)
						 (minus:SI (match_dup 0)
							   (const_int 0)))))
			       (label_ref:SI (match_operand 3 "" "")))
		      (pc)))]
  ""
  "casel %0,$0,%1\;.align %@")


; casesi alternate form as found in vax code.  another form to
; compensate for the table's offset being no distance (0 displacement)

(define_insn ""
  [(set (pc)
	(if_then_else (le (match_operand:SI 0 "general_operand" "g")
			  (match_operand:SI 1 "general_operand" "g"))
		      (plus:SI (sign_extend:SI
				(mem:HI (plus:SI (pc)
						 (match_dup 0))))
			       (label_ref:SI (match_operand 3 "" "")))
		      (pc)))]
  ""
  "casel %0,$0,%1 \;.align %@")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (lt (plus:SI (match_operand:SI 0 "general_operand" "+g")
		      (const_int 1))
	     (match_operand:SI 1 "general_operand" "g"))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))
   (set (match_dup 0)
	(plus:SI (match_dup 0)
		 (const_int 1)))]
  ""
  "aoblss %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (le (plus:SI (match_operand:SI 0 "general_operand" "+g")
		      (const_int 1))
	     (match_operand:SI 1 "general_operand" "g"))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))
   (set (match_dup 0)
	(plus:SI (match_dup 0)
		 (const_int 1)))]
  ""
  "aobleq %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (ge (plus:SI (match_operand:SI 0 "general_operand" "+g")
		      (const_int 1))
	     (match_operand:SI 1 "general_operand" "g"))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))
   (set (match_dup 0)
	(plus:SI (match_dup 0)
		 (const_int 1)))]
  ""
  "aoblss %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (gt (plus:SI (match_operand:SI 0 "general_operand" "+g")
		      (const_int 1))
	     (match_operand:SI 1 "general_operand" "g"))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))
   (set (match_dup 0)
	(plus:SI (match_dup 0)
		 (const_int 1)))]
  ""
  "aobleq %1,%0,%l2")

; bbs/bbc

(define_insn ""
  [(set (pc)
	(if_then_else
	 (ne (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
		      (subreg:QI (match_operand:SI 1 "general_operand" "g") 0))
	     (const_int 0))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))]
  ""
  "bbs %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (eq (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
		      (subreg:QI (match_operand:SI 1 "general_operand" "g") 0))
	     (const_int 0))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))]
  ""
  "bbc %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (ne (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
		      (subreg:QI (match_operand:SI 1 "general_operand" "g") 0))
	     (const_int 0))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))]
  ""
  "bbc %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (eq (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
		      (subreg:QI (match_operand:SI 1 "general_operand" "g") 0))
	     (const_int 0))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))]
  ""
  "bbs %1,%0,%l2")

; if the shift count is a byte in a register we can use it as a long

(define_insn ""
  [(set (pc)
	(if_then_else
	 (ne (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
			      (match_operand:QI 1 "register_operand" "r"))
	     (const_int 0))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))]
  ""
  "bbs %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (eq (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
			      (match_operand:QI 1 "register_operand" "r"))
	     (const_int 0))
	 (label_ref (match_operand 2 "" ""))
	 (pc)))]
  ""
  "bbc %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (ne (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
			      (match_operand:QI 1 "register_operand" "r"))
	     (const_int 0))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))]
  ""
  "bbc %1,%0,%l2")

(define_insn ""
  [(set (pc)
	(if_then_else
	 (eq (sign_extract:SI (match_operand:SI 0 "register_operand" "rm")
			      (const_int 1)
			      (match_operand:QI 1 "register_operand" "r"))
	     (const_int 0))
	 (pc)
	 (label_ref (match_operand 2 "" ""))))]
  ""
  "bbs %1,%0,%l2")

; special case for 1 << constant.  We don't do these because they are slower
; than the bitl instruction

;(define_insn ""
;  [(set (pc)
;	(if_then_else
;	 (ne (and:SI (match_operand:SI 0 "nonimmediate_operand" "%rm")
;		     (match_operand:SI 1 "immediate_operand" "i"))
;	     (const_int 0))
;	 (label_ref (match_operand 2 "" ""))
;	 (pc)))]
;  "GET_CODE (operands[1]) == CONST_INT
;   && exact_log2 (INTVAL (operands[1])) >= 0"
;  "*
;{
;  operands[1]
;    = GEN_INT (exact_log2 (INTVAL (operands[1])));
;  return \"bbs %1,%0,%l2\";
;}")
;
;(define_insn ""
;  [(set (pc)
;	(if_then_else
;	 (eq (and:SI (match_operand:SI 0 "nonimmediate_operand" "%rm")
;		     (match_operand:SI 1 "immediate_operand" "i"))
;	     (const_int 0))
;	 (label_ref (match_operand 2 "" ""))
;	 (pc)))]
;  "GET_CODE (operands[1]) == CONST_INT
;   && exact_log2 (INTVAL (operands[1])) >= 0"
;  "*
;{
;  operands[1]
;    = GEN_INT (exact_log2 (INTVAL (operands[1])));
;  return \"bbc %1,%0,%l2\";
;}")
;
;(define_insn ""
;  [(set (pc)
;	(if_then_else
;	 (ne (and:SI (match_operand:SI 0 "nonimmediate_operand" "%rm")
;		     (match_operand:SI 1 "immediate_operand" "i"))
;	     (const_int 0))
;	 (pc)
;	 (label_ref (match_operand 2 "" ""))))]
;  "GET_CODE (operands[1]) == CONST_INT
;   && exact_log2 (INTVAL (operands[1])) >= 0"
;  "*
;{
;  operands[1]
;    = GEN_INT (exact_log2 (INTVAL (operands[1])));
;  return \"bbc %1,%0,%l2\";
;}")
;
;(define_insn ""
;  [(set (pc)
;	(if_then_else
;	 (eq (and:SI (match_operand:SI 0 "nonimmediate_operand" "%rm")
;		     (match_operand:SI 1 "immediate_operand" "i"))
;	     (const_int 0))
;	 (pc)
;	 (label_ref (match_operand 2 "" ""))))]
;  "GET_CODE (operands[1]) == CONST_INT
;   && exact_log2 (INTVAL (operands[1])) >= 0"
;  "*
;{
;  operands[1]
;    = GEN_INT (exact_log2 (INTVAL (operands[1])));
;  return \"bbs %1,%0,%l2\";
;}")