c4x.md

gcc编译工具没有什么特别

(define_attr "onlyreg_nomod" "false,true"
       (cond [(eq_attr "type" "unary,unarycc,compare,lda,store")
                       (if_then_else (and (match_operand 0 "not_modify_reg" "")
                                          (match_operand 1 "not_modify_reg" ""))
                                     (const_string "true") (const_string "false"))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (and (match_operand 0 "not_modify_reg" "")
                                          (and (match_operand 1 "not_modify_reg" "")
                                               (match_operand 2 "not_modify_reg" "")))
                                     (const_string "true") (const_string "false"))]
             (const_string "false")))

(define_attr "not_repeat_reg" "false,true"
       (cond [(eq_attr "type" "unary,unarycc,compare,lda,ldp,store")
                       (if_then_else (and (match_operand 0 "not_rc_reg" "")
                                          (match_operand 1 "not_rc_reg" ""))
                                     (const_string "true") (const_string "false"))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (and (match_operand 0 "not_rc_reg" "")
                                          (and (match_operand 1 "not_rc_reg" "")
                                               (match_operand 2 "not_rc_reg" "")))
                                     (const_string "true") (const_string "false"))]
             (const_string "false")))

/* Disable compare because the c4x contains a bug. The cmpi insn sets the CC
   in the read phase of the pipeline instead of the execution phase when
   two registers are compared.  */
(define_attr "in_annul_slot_1" "false,true"
  (if_then_else (and (and (eq_attr "cpu" "c4x")
		          (eq_attr "type" "!jump,call,rets,jmpc,compare,db,dbc,repeat,repeat_top,laj,push,pop,lda,ldp,multi"))
		     (eq_attr "onlyreg" "true"))
		(const_string "true")
		(const_string "false")))

(define_attr "in_annul_slot_2" "false,true"
  (if_then_else (and (and (eq_attr "cpu" "c4x")
		          (eq_attr "type" "!jump,call,rets,jmpc,db,dbc,repeat,repeat_top,laj,push,pop,ldp,multi"))
		     (eq_attr "onlyreg_nomod" "true"))
		(const_string "true")
		(const_string "false")))

(define_attr "in_annul_slot_3" "false,true"
  (if_then_else (and (eq_attr "cpu" "c4x")
		     (eq_attr "type" "!jump,call,rets,jmpc,db,dbc,repeat,repeat_top,laj,push,pop,multi"))
		(const_string "true")
		(const_string "false")))

(define_attr "in_delay_slot" "false,true"
  (if_then_else (eq_attr "type" "!jump,call,rets,jmpc,db,dbc,repeat,repeat_top,laj,multi")
		(const_string "true")
		(const_string "false")))

(define_attr "in_repeat_slot" "false,true"
  (if_then_else (and (eq_attr "cpu" "c4x")
		     (and (eq_attr "type" "!jump,call,rets,jmpc,db,dbc,repeat,repeat_top,laj,multi")
		          (eq_attr "not_repeat_reg" "true")))
		(const_string "true")
		(const_string "false")))

(define_attr "in_dbc_slot" "false,true"
  (if_then_else (eq_attr "type" "!jump,call,rets,jmpc,unarycc,binarycc,compare,db,dbc,repeat,repeat_top,laj,multi")
		(const_string "true")
		(const_string "false")))

(define_delay (eq_attr "type" "jmpc")
              [(eq_attr "in_delay_slot" "true")
               (eq_attr "in_annul_slot_1" "true")
               (eq_attr "in_annul_slot_1" "true")

               (eq_attr "in_delay_slot" "true")
               (eq_attr "in_annul_slot_2" "true")
               (eq_attr "in_annul_slot_2" "true")

               (eq_attr "in_delay_slot" "true")
               (eq_attr "in_annul_slot_3" "true")
               (eq_attr "in_annul_slot_3" "true") ])


(define_delay (eq_attr "type" "repeat_top")
              [(eq_attr "in_repeat_slot" "true") (nil) (nil)
               (eq_attr "in_repeat_slot" "true") (nil) (nil)
               (eq_attr "in_repeat_slot" "true") (nil) (nil)])

(define_delay (eq_attr "type" "jump,db")
              [(eq_attr "in_delay_slot" "true") (nil) (nil)
               (eq_attr "in_delay_slot" "true") (nil) (nil)
               (eq_attr "in_delay_slot" "true") (nil) (nil)])


; Decrement and branch conditional instructions cannot modify the
; condition codes for the cycles in the delay slots.
;
(define_delay (eq_attr "type" "dbc")
              [(eq_attr "in_dbc_slot" "true") (nil) (nil)
               (eq_attr "in_dbc_slot" "true") (nil) (nil)
               (eq_attr "in_dbc_slot" "true") (nil) (nil)])

; The LAJ instruction has three delay slots but the last slot is
; used for pushing the return address.  Thus we can only use two slots.
;
(define_delay (eq_attr "type" "laj")
              [(eq_attr "in_delay_slot" "true") (nil) (nil)
               (eq_attr "in_delay_slot" "true") (nil) (nil)])

;
; C4x UNSPEC NUMBERS
;
;  1 BU/BUD
;  2 RPTS
;  3 LSH
;  4 cmphi
;  5 RCPF
;  6 RND
;  7 repeat block filler
;  8 loadhf_int
;  9 storehf_int
; 10 RSQRF
; 11 loadqf_int
; 12 storeqf_int
; 22 rptb_init

;
; C4x FUNCTIONAL UNITS
;
; Define functional units for instruction scheduling to minimise
; pipeline conflicts.
;
; With the C3x, an external memory write (with no wait states) takes
; two cycles and an external memory read (with no wait states) takes
; one cycle.  However, an external read following an external write
; takes two cycles.  With internal memory, reads and writes take
; half a cycle.
;
; When a C4x address register is loaded it will not be available for
; an extra machine cycle.  Calculating with a C4x address register
; makes it unavailable for 2 machine cycles.  To notify GCC of these
; pipeline delays, each of the auxiliary and index registers are declared
; as separate functional units.
;
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
;			TEST READY-DELAY ISSUE-DELAY [CONFLICT-LIST])
;
; MULTIPLICITY 1 (C4x has no independent identical function units)
; SIMULTANEITY 0 (C4x is pipelined)
; READY_DELAY  1 (Results usually ready after every cyle)
; ISSUE_DELAY  1 (Can issue insns every cycle)

; Just some dummy definitions. The real work is done in c4x_adjust_cost.
; These are needed so the min/max READY_DELAY is known.

(define_function_unit "dummy" 1 0 (const_int 0) 1 1)
(define_function_unit "dummy" 1 0 (const_int 0) 2 1)
(define_function_unit "dummy" 1 0 (const_int 0) 3 1)

;(define_function_unit "ar0" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setar0" "1")
;                 (eq_attr "usear0" "1")))
;       3 1 )

;(define_function_unit "ar0" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setlda_ar0" "1")
;                 (eq_attr "usear0" "1")))
;       2 1 )

;(define_function_unit "ar0" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "usear0" "1")
;                 (eq_attr "readar0" "1")))
;       2 1 )

; The attribute setar0 is set to 1 for insns where ar0 is a dst operand.
; Note that the attributes unarycc and binarycc do not apply
; if ar0 is a dst operand (only loading an ext. prec. reg. sets CC)
(define_attr "setar0" ""
       (cond [(eq_attr "type" "unary,binary")
                       (if_then_else (match_operand 0 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "setlda_ar0" ""
       (cond [(eq_attr "type" "lda")
                       (if_then_else (match_operand 0 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

; The attribute usear0 is set to 1 for insns where ar0 is used
; for addressing, as a src operand, or as a dst operand.
(define_attr "usear0" ""
       (cond [(eq_attr "type" "compare,store")
                       (if_then_else (match_operand 0 "ar0_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar0_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar0_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "db,dbc")
                       (if_then_else (match_operand 0 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

; The attribute readar0 is set to 1 for insns where ar0 is a src operand.
(define_attr "readar0" ""
       (cond [(eq_attr "type" "compare")
                       (if_then_else (match_operand 0 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,store,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar0_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

;(define_function_unit "ar1" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setar1" "1")
;                 (eq_attr "usear1" "1")))
;       3 1 )

;(define_function_unit "ar1" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setlda_ar1" "1")
;                 (eq_attr "usear1" "1")))
;       2 1 )

;(define_function_unit "ar1" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "usear1" "1")
;                 (eq_attr "readar1" "1")))
;       2 1 )

(define_attr "setar1" ""
       (cond [(eq_attr "type" "unary,binary")
                       (if_then_else (match_operand 0 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "setlda_ar1" ""
       (cond [(eq_attr "type" "lda")
                       (if_then_else (match_operand 0 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "usear1" ""
       (cond [(eq_attr "type" "compare,store")
                       (if_then_else (match_operand 0 "ar1_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar1_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar1_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "db,dbc")
                       (if_then_else (match_operand 0 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "readar1" ""
       (cond [(eq_attr "type" "compare")
                       (if_then_else (match_operand 0 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,store,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar1_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

;(define_function_unit "ar2" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setar2" "1")
;                 (eq_attr "usear2" "1")))
;       3 1 )

;(define_function_unit "ar2" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setlda_ar2" "1")
;                 (eq_attr "usear2" "1")))
;       2 1 )

;(define_function_unit "ar2" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "usear2" "1")
;                 (eq_attr "readar2" "1")))
;       2 1 )

(define_attr "setar2" ""
       (cond [(eq_attr "type" "unary,binary")
                       (if_then_else (match_operand 0 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "setlda_ar2" ""
       (cond [(eq_attr "type" "lda")
                       (if_then_else (match_operand 0 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "usear2" ""
       (cond [(eq_attr "type" "compare,store")
                       (if_then_else (match_operand 0 "ar2_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar2_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar2_mem_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "db,dbc")
                       (if_then_else (match_operand 0 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

(define_attr "readar2" ""
       (cond [(eq_attr "type" "compare")
                       (if_then_else (match_operand 0 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "compare,store,lda,unary,unarycc,binary,binarycc")
                       (if_then_else (match_operand 1 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))
              (eq_attr "type" "binary,binarycc")
                       (if_then_else (match_operand 2 "ar2_reg_operand" "")
                                     (const_int 1) (const_int 0))]
             (const_int 0)))

;(define_function_unit "ar3" 1 0
;       (and (eq_attr "cpu" "c4x")
;            (and (eq_attr "setar3" "1")