gmicro.h

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    }								\
      if (current_function_pops_args) {				\
	myoutput_sp_adjust(FILE, "add", 			\
	    (fsize + 4 + current_function_pops_args));		\
	fprintf(FILE, "\tjmp @(%d,sp)\n", current_function_pops_args);\
    } else {							\
	if (fsize > 0)						\
	    myoutput_sp_adjust(FILE, "add", fsize);		\
	fprintf(FILE, "\trts\n");				\
    }								\
  }								\
}

/* This is a hook for other tm files to change.  */
#define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE)

/* If the memory address ADDR is relative to the frame pointer,
   correct it to be relative to the stack pointer instead.
   This is for when we don't use a frame pointer.
   ADDR should be a variable name.  */

/* You have to change the next macro if you want to use more complex
   addressing modes (such as double indirection and  more than one
   chain-addressing stages). */

#define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH)  \
{ int offset = -1;							\
  rtx regs = stack_pointer_rtx;						\
  if (ADDR == frame_pointer_rtx)					\
    offset = 0;								\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
	   && GET_CODE (XEXP (ADDR, 1)) == CONST_INT)			\
    offset = INTVAL (XEXP (ADDR, 1));					\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
    { rtx other_reg = XEXP (ADDR, 1);					\
      offset = 0;							\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }	\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
    { rtx other_reg = XEXP (ADDR, 0);					\
      offset = 0;							\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }	\
  else if (GET_CODE (ADDR) == PLUS					\
	   && GET_CODE (XEXP (ADDR, 0)) == PLUS				\
	   && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx		\
	   && GET_CODE (XEXP (ADDR, 1)) == CONST_INT)			\
    { rtx other_reg = XEXP (XEXP (ADDR, 0), 1);				\
      offset = INTVAL (XEXP (ADDR, 1));					\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }	\
  else if (GET_CODE (ADDR) == PLUS					\
	   && GET_CODE (XEXP (ADDR, 0)) == PLUS				\
	   && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx		\
	   && GET_CODE (XEXP (ADDR, 1)) == CONST_INT)			\
    { rtx other_reg = XEXP (XEXP (ADDR, 0), 0);				\
      offset = INTVAL (XEXP (ADDR, 1));					\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }	\
  if (offset >= 0)							\
    { int regno;							\
      extern char call_used_regs[];					\
      for (regno = 16; regno < 32; regno++)				\
        if (regs_ever_live[regno] && ! call_used_regs[regno])		\
          offset += 12;							\
      for (regno = 0; regno < 16; regno++)				\
	if (regs_ever_live[regno] && ! call_used_regs[regno])		\
	  offset += 4;							\
      offset -= 4;							\
      ADDR = plus_constant (regs, offset + (DEPTH)); } }

/* Addressing modes, and classification of registers for them.  */

/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */

/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */

/* Macros to check register numbers against specific register classes.  */

/* These assume that REGNO is a hard or pseudo reg number.
   They give nonzero only if REGNO is a hard reg of the suitable class
   or a pseudo reg currently allocated to a suitable hard reg.
   Since they use reg_renumber, they are safe only once reg_renumber
   has been allocated, which happens in local-alloc.c.  */

/* Gmicro */
#define REGNO_OK_FOR_GREG_P(REGNO) \
((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
#define REGNO_OK_FOR_FPU_P(REGNO) \
(((REGNO) ^ 0x10) < 16 || (unsigned) (reg_renumber[REGNO] ^ 0x10) < 16)

#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_GREG_P(REGNO)
#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_GREG_P(REGNO)

/* Now macros that check whether X is a register and also,
   strictly, whether it is in a specified class.

   These macros are specific to the Gmicro, and may be used only
   in code for printing assembler insns and in conditions for
   define_optimization.  */

/* 1 if X is an fpu register.  */

#define FPU_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPU_P (REGNO (X)))

/* I used GREG_P in the gmicro.md file. */

#ifdef REG_OK_STRICT
#define GREG_P(X) (REG_P (X) && REGNO_OK_FOR_GREG_P (REGNO(X)))
#else
#define GREG_P(X) (REG_P (X) && ((REGNO (X) & ~0xf) != 0x10))
#endif

/* Maximum number of registers that can appear in a valid memory address.  */

/* The Gmicro allows more registers in the chained addressing mode.
   But I do not know gcc supports such an architecture. */

#define MAX_REGS_PER_ADDRESS 2

/* Recognize any constant value that is a valid address.  */

#define CONSTANT_ADDRESS_P(X)   \
  (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
   || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST		\
   || GET_CODE (X) == HIGH)

/* Nonzero if the constant value X is a legitimate general operand.
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */

#define LEGITIMATE_CONSTANT_P(X) 1

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
   and check its validity for a certain class.
   We have two alternate definitions for each of them.
   The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.
   The symbol REG_OK_STRICT causes the latter definition to be used.

   Most source files want to accept pseudo regs in the hope that
   they will get allocated to the class that the insn wants them to be in.
   Source files for reload pass need to be strict.
   After reload, it makes no difference, since pseudo regs have
   been eliminated by then.  */

#ifndef REG_OK_STRICT

/* Nonzero if X is a hard reg that can be used as an index
   or if it is a pseudo reg.  */
#define REG_OK_FOR_INDEX_P(X) ((REGNO (X) & ~0xf) != 0x10)
/* Nonzero if X is a hard reg that can be used as a base reg
   or if it is a pseudo reg.  */
#define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~0xf) != 0x10)

#else

/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))

#endif

/* The gcc uses the following effective address of the Gmicro.
					       (without using PC!!).
   {@} ( {Rbase} + {Disp} + {Rindex * [1,2,4,8]} )
	where
		@:     memory indirection.
		Rbase: Base Register = General Register.
		Disp:  Displacement (up to 32bits)
		Rindex: Index Register = General Register.
		[1,2,4,8]: Scale of Index. 1 or 2 or 4 or 8.
		The inside of { } can be omitted.
    This restricts the chained addressing up to 1 stage.  */



/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
   that is a valid memory address for an instruction.
   The MODE argument is the machine mode for the MEM expression
   that wants to use this address.

   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
   except for CONSTANT_ADDRESS_P which is actually machine-independent.  */

#define REG_CODE_BASE_P(X) \
  (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))

#define REG_CODE_INDEX_P(X) \
  (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))

/* GET_CODE(X) must be PLUS. This macro does not check for PLUS! */
#define BASE_PLUS_DISP_P(X) \
   ( REG_CODE_BASE_P (XEXP (X, 0)) 		\
     && CONSTANT_ADDRESS_P (XEXP (X, 1))	\
    ||						\
     REG_CODE_BASE_P (XEXP (X, 1)) 		\
     && CONSTANT_ADDRESS_P (XEXP (X, 0)) )

/* 1 if X is {0,Rbase} + {0,disp}.  */
#define BASED_ADDRESS_P(X)  \
  (CONSTANT_ADDRESS_P (X)	\
   || REG_CODE_BASE_P (X)	\
   || (GET_CODE (X) == PLUS)	\
       && BASE_PLUS_DISP_P (X))

/* 1 if X is 1 or 2 or 4 or 8. GET_CODE(X) must be CONST_INT. */
#define SCALE_OF_INDEX_P(X) \
  ( INTVAL(X) == 4	\
    || INTVAL(X) == 2	\
    || INTVAL(X) == 8	\
    || INTVAL(X) == 1 )

/* #define INDEX_TERM_P(X,MODE)  */
#define INDEX_TERM_P(X)  \
  ( REG_CODE_INDEX_P(X)					\
    || (GET_CODE (X) == MULT				\
	&& ( (xfoo0 = XEXP (X, 0)), (xfoo1 = XEXP(X, 1)), \
	     ( ( (GET_CODE (xfoo0) == CONST_INT)	\
	       && SCALE_OF_INDEX_P (xfoo0)		\
	       && REG_CODE_INDEX_P (xfoo1) )		\
	      ||					\
	       ( (GET_CODE (xfoo1) == CONST_INT)		\
	       && SCALE_OF_INDEX_P (xfoo1)		\
	       && REG_CODE_INDEX_P (xfoo0) ) ))))

/* Assumes there are no cases such that X = (Ireg + Disp) + Disp */
#define BASE_DISP_INDEX_P(X)  \
  ( BASED_ADDRESS_P (X)							\
   || ( (GET_CODE (X) == PLUS)						\
      && ( ( (xboo0 = XEXP (X, 0)), (xboo1 = XEXP (X, 1)),		\
	  (REG_CODE_BASE_P (xboo0)					\
	    && (GET_CODE (xboo1) == PLUS)				\
	    && ( ( CONSTANT_ADDRESS_P (XEXP (xboo1, 0))			\
		   && INDEX_TERM_P (XEXP (xboo1, 1)) )			\
	         || ( CONSTANT_ADDRESS_P (XEXP (xboo1, 1))		\
		     && INDEX_TERM_P (XEXP (xboo1, 0))) )))		\
	 ||								\
	  (CONSTANT_ADDRESS_P (xboo0)					\
	    && (GET_CODE (xboo1) == PLUS)				\
	    && ( ( REG_CODE_BASE_P (XEXP (xboo1, 0))			\
	 	   && INDEX_TERM_P (XEXP (xboo1, 1)) )			\
	         || ( REG_CODE_BASE_P (XEXP (xboo1, 1))			\
		      && INDEX_TERM_P (XEXP (xboo1, 0))) ))		\
	||								\
	  (INDEX_TERM_P (xboo0)						\
	    && ( ( (GET_CODE (xboo1) == PLUS)				\
	          && ( ( REG_CODE_BASE_P (XEXP (xboo1, 0))		\
		      && CONSTANT_ADDRESS_P (XEXP (xboo1, 1)) )		\
	               || ( REG_CODE_BASE_P (XEXP (xboo1, 1))   	\
		      && CONSTANT_ADDRESS_P (XEXP (xboo1, 0))) ))	\
		||							\
		 (CONSTANT_ADDRESS_P (xboo1))				\
		||							\
		 (REG_CODE_BASE_P (xboo1)) )))))

/*
	If you want to allow double-indirection,
	you have to change the <fp-relative> => <sp-relative> conversion
	routine. M.Yuhara

#ifdef REG_OK_STRICT
#define DOUBLE_INDIRECTION(X,ADDR) {\
    if (BASE_DISP_INDEX_P (XEXP (XEXP (X, 0), 0) )) goto ADDR; \
    }
#else
#define DOUBLE_INDIRECTION(X,ADDR) { }
#endif
*/


#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) {\
  register rtx xboo0, xboo1, xfoo0, xfoo1;		\
  if (GET_CODE (X) == MEM) { 				\
    /*							\
    if (GET_CODE (XEXP (X,0)) == MEM) {			\
	DOUBLE_INDIRECTION(X,ADDR);			\
    } else {						\
	if (BASE_DISP_INDEX_P (XEXP (X, 0))) goto ADDR;	\
    }							\
    */							\
  } else {						\
	if (BASE_DISP_INDEX_P (X)) goto ADDR;		\
	if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC)	\
	    && REG_P (XEXP (X, 0))					\
	    && (REGNO (XEXP (X, 0)) == STACK_POINTER_REGNUM))		\
		goto ADDR;						\
  }							\
}


/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.

   For the Gmicro, nothing is done now. */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.
   On the VAX, the predecrement and postincrement address depend thus
   (the amount of decrement or increment being the length of the operand)
   and all indexed address depend thus (because the index scale factor
   is the length of the operand).
   The Gmicro mimics the VAX now. Since ADDE is legitimate, it cannot
   include auto-inc/dec. */

/* Unnecessary ??? */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	\
 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC)	\
     goto LABEL; }


/* Specify the machine mode that this machine uses
   for the index in the tablejump instruction.  */
/* #define CASE_VECTOR_MODE HImode */
#define CASE_VECTOR_MODE SImode

/* Define as C expression which evaluates to nonzero if the tablejump
   instruction expects the table to contain offsets from the address of the
   table.
   Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1

/* Specify the tree operation to be used to convert reals to integers.  */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR

/* This is the kind of divide that is easiest to do in the general case.  */
#define EASY_DIV_EXPR TRUNC_DIV_EXPR

/* Define this as 1 if `char' should by default be signed; else as 0.  */
#define DEFAULT_SIGNED_CHAR 1

/* Max number of bytes we can move from memory to memory
   in one reasonably fast instruction.  */
#define MOVE_MAX 4

/* Define this if zero-extension is slow (more than one real instruction).  */
/* #define SLOW_ZERO_EXTEND */

/* Nonzero if access to memory by bytes is slow and undesirable.  */
#define SLOW_BYTE_ACCESS 0

/* Define if shifts truncate the shift count
   which implies one can omit a sign-extension or zero-extension
   of a shift count.  */
/* #define SHIFT_COUNT_TRUNCATED */

/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
   is done just by pretending it is already truncated.  */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1

/* We assume that the store-condition-codes instructions store 0 for false
   and some other value for true.  This is the value stored for true.  */

/* #define STORE_FLAG_VALUE -1 */

/* When a prototype says `char' or `short', really pass an `int'.  */
#define PROMOTE_PROTOTYPES

/* Specify the machine mode that pointers have.
   After generation of rtl, the compiler makes no further distinction
   between pointers and any other objects of this machine mode.  */
#define Pmode SImode

/* A function address in a call instruction
   is a byte address (for indexing purposes)
   so give the MEM rtx a byte's mode.  */
#define FUNCTION_MODE QImode

/* Compute the cost of computing a constant rtl expression RTX
   whose rtx-code is CODE.  The body of this macro is a portion
   of a switch statement.  If the code is computed here,
   return it with a return statement.  Otherwise, break from the switch.  */

#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
  case CONST_INT:						\
    if ((unsigned) INTVAL (RTX) < 8) return 0;			\
    if ((unsigned) (INTVAL (RTX) + 0x80) < 0x100) return 1;	\
    if ((unsigned) (INTVAL (RTX) + 0x8000) < 0x10000) return 2;	\
  case CONST:							\
  case LABEL_REF:						\
  case SYMBOL_REF:						\
    return 3;							\
  case CONST_DOUBLE:						\
    return 5;

/* Define subroutines to call to handle multiply and divide.
   The `*' prevents an underscore from being prepended by the compiler.  */
/* Use libgcc on Gmicro */