basysrevedemo.syr

actel BASYs开发板自带的demo程序

Entity <ckmux> analyzed. Unit <ckmux> generated.

Analyzing Entity <videoromnotext> in library <work> (Architecture <Behavioral>).
Entity <videoromnotext> analyzed. Unit <videoromnotext> generated.

Analyzing Entity <snakeleddemo> in library <work> (Architecture <Behavioral>).
WARNING:Xst:819 - "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/SnakeLedDemo.vhd" line 144: The following signals are missing in the process sensitivity list:
   Snake<0>, Target, NextTarget, Snake<1>, Snake<2>, Snake<3>, Snake<4>, Snake<5>, Snake<6>, Direction.
WARNING:Xst:819 - "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/SnakeLedDemo.vhd" line 201: The following signals are missing in the process sensitivity list:
   Snake<0>, Target.
WARNING:Xst:819 - "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/SnakeLedDemo.vhd" line 217: The following signals are missing in the process sensitivity list:
   Snake<0>, segPwm, Target, Snake<1>, Snake<2>, Snake<3>, Snake<4>, Snake<5>, Snake<6>.
Entity <snakeleddemo> analyzed. Unit <snakeleddemo> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Performing bidirectional port resolution...

Synthesizing Unit <dispctrl>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/DispCtrl.vhd".
WARNING:Xst:737 - Found 32-bit latch for signal <Horigin>.
WARNING:Xst:737 - Found 32-bit latch for signal <Vorigin>.
    Found 2-bit 4-to-1 multiplexer for signal <outBlue>.
    Found 3-bit 4-to-1 multiplexer for signal <outGreen>.
    Found 3-bit 4-to-1 multiplexer for signal <outRed>.
    Found 32-bit adder for signal <$add0002> created at line 100.
    Found 32-bit adder for signal <$add0003> created at line 100.
    Found 8-bit subtractor for signal <$addsub0000> created at line 115.
    Found 32-bit comparator greater for signal <$cmp_gt0000> created at line 100.
    Found 32-bit comparator greater for signal <$cmp_gt0001> created at line 100.
    Found 10-bit comparator less for signal <$cmp_lt0000> created at line 99.
    Found 10-bit comparator less for signal <$cmp_lt0001> created at line 99.
    Found 32-bit comparator less for signal <$cmp_lt0002> created at line 100.
    Found 32-bit comparator less for signal <$cmp_lt0003> created at line 100.
    Found 11-bit adder for signal <$sub0000> created at line 115.
    Found 8-bit subtractor for signal <$sub0001> created at line 115.
    Found 8-bit subtractor for signal <$sub0002> created at line 118.
    Found 8-bit subtractor for signal <$sub0003> created at line 121.
    Found 6-bit subtractor for signal <adrVideoLine>.
    Found 6-bit subtractor for signal <adrVideoPixel>.
    Found 28-bit up counter for signal <cntDyn>.
    Summary:
	inferred   1 Counter(s).
	inferred   9 Adder/Subtractor(s).
	inferred   6 Comparator(s).
	inferred   8 Multiplexer(s).
Unit <dispctrl> synthesized.


Synthesizing Unit <synchro>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/Synchro.vhd".
    Found 1-bit register for signal <HS>.
    Found 1-bit register for signal <VS>.
    Found 10-bit up counter for signal <intHcnt>.
    Found 10-bit up counter for signal <intVcnt>.
    Summary:
	inferred   2 Counter(s).
	inferred   2 D-type flip-flop(s).
Unit <synchro> synthesized.


Synthesizing Unit <mouse_controller>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/MouseCtrl.vhd".
    Found finite state machine <FSM_0> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 34                                             |
    | Transitions        | 91                                             |
    | Inputs             | 8                                              |
    | Outputs            | 20                                             |
    | Clock              | clk (rising_edge)                              |
    | Reset              | rst (positive)                                 |
    | Reset type         | asynchronous                                   |
    | Reset State        | reset                                          |
    | Power Up State     | reset                                          |
    | Encoding           | automatic                                      |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 4x1-bit ROM for signal <$mux0067>.
    Found 8-bit register for signal <tx_data>.
    Found 1-bit register for signal <new_event>.
    Found 4-bit register for signal <zpos>.
    Found 1-bit register for signal <right>.
    Found 1-bit register for signal <middle>.
    Found 1-bit register for signal <left>.
    Found 10-bit register for signal <ypos>.
    Found 10-bit register for signal <xpos>.
    Found 1-bit register for signal <write>.
    Found 11-bit adder for signal <$add0004> created at line 430.
    Found 11-bit adder for signal <$add0005> created at line 366.
    Found 11-bit adder for signal <$addsub0000> created at line 390.
    Found 8-bit adder for signal <$addsub0001> created at line 966.
    Found 11-bit adder for signal <$addsub0002> created at line 454.
    Found 11-bit comparator greater for signal <$cmp_gt0000> created at line 394.
    Found 11-bit comparator greater for signal <$cmp_gt0001> created at line 458.
    Found 1-bit register for signal <haswheel>.
    Found 1-bit register for signal <left_down>.
    Found 1-bit register for signal <middle_down>.
    Found 1-bit register for signal <right_down>.
    Found 8-bit register for signal <x_inc>.
    Found 10-bit register for signal <x_max>.
    Found 1-bit register for signal <x_new>.
    Found 1-bit register for signal <x_overflow>.
    Found 11-bit register for signal <x_pos>.
    Found 1-bit register for signal <x_sign>.
    Found 8-bit register for signal <y_inc>.
    Found 10-bit register for signal <y_max>.
    Found 1-bit register for signal <y_new>.
    Found 1-bit register for signal <y_overflow>.
    Found 11-bit register for signal <y_pos>.
    Found 1-bit register for signal <y_sign>.
    Summary:
	inferred   1 Finite State Machine(s).
	inferred   1 ROM(s).
	inferred  85 D-type flip-flop(s).
	inferred   5 Adder/Subtractor(s).
	inferred   2 Comparator(s).
Unit <mouse_controller> synthesized.


Synthesizing Unit <ps2interface>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/Ps2Inerface.vhd".
    Found 256x1-bit ROM for signal <$rom0000> created at line 411.
    Found 256x1-bit ROM for signal <$rom0001> created at line 408.
    Found finite state machine <FSM_1> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 17                                             |
    | Transitions        | 39                                             |
    | Inputs             | 10                                             |
    | Outputs            | 19                                             |
    | Clock              | clk (rising_edge)                              |
    | Reset              | rst (positive)                                 |
    | Reset type         | asynchronous                                   |
    | Reset State        | idle                                           |
    | Power Up State     | idle                                           |
    | Encoding           | automatic                                      |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 1-bit tristate buffer for signal <ps2_clk>.
    Found 1-bit register for signal <read>.
    Found 8-bit register for signal <rx_data>.
    Found 1-bit tristate buffer for signal <ps2_data>.
    Found 1-bit register for signal <err>.
    Found 1-bit xor2 for signal <$xor0000> created at line 387.
    Found 1-bit xor2 for signal <$xor0001> created at line 488.
    Found 1-bit xor2 for signal <$xor0003> created at line 363.
    Found 4-bit up counter for signal <bit_count>.
    Found 4-bit up counter for signal <clk_count>.
    Found 1-bit register for signal <clk_inter>.
    Found 4-bit up counter for signal <data_count>.
    Found 1-bit register for signal <data_inter>.
    Found 14-bit up counter for signal <delay_100us_count>.
    Found 1-bit register for signal <delay_100us_done>.
    Found 11-bit up counter for signal <delay_20us_count>.
    Found 1-bit register for signal <delay_20us_done>.
    Found 6-bit up counter for signal <delay_63clk_count>.
    Found 1-bit register for signal <delay_63clk_done>.
    Found 11-bit register for signal <frame>.
    Found 1-bit register for signal <load_rx_data>.
    Found 1-bit register for signal <load_tx_data>.
    Found 1-bit register for signal <ps2_clk_clean>.
    Found 1-bit register for signal <ps2_clk_h>.
    Found 1-bit register for signal <ps2_clk_s>.
    Found 1-bit register for signal <ps2_data_clean>.
    Found 1-bit register for signal <ps2_data_h>.
    Found 1-bit register for signal <ps2_data_s>.
    Found 1-bit register for signal <rx_parity>.
    Found 1-bit register for signal <tx_parity>.
    Summary:
	inferred   1 Finite State Machine(s).
	inferred   2 ROM(s).
	inferred   6 Counter(s).
	inferred  36 D-type flip-flop(s).
	inferred   2 Tristate(s).
Unit <ps2interface> synthesized.


Synthesizing Unit <gnd10>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/gnd10.vhd".
Unit <gnd10> synthesized.


Synthesizing Unit <videoromnotext>.
    Related source file is "C:/Projects/Basys_Projects/Basys_REVE/Demo/UncompiledBasysRevEDemo_12-04-06/VideoRomNoText.vhd".
    Found 4096x3-bit ROM for signal <$rom0000> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0001> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0002> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0003> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0004> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0005> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0006> created at line 113.
    Found 4096x3-bit ROM for signal <$rom0007> created at line 113.