test.c

tms320dm642和ov7640通过i2c口通讯的源程序

#define CHIP_DM642 1

#define OV7640_ADDRESS 0x21

#include <csl.h>

#include <csl_i2c.h>
#include <csl_emifa.h>
#include <stdio.h>

CHIP_Config chippercfg = {
 
        CHIP_I2C+CHIP_VP1,
};

EMIFA_Config emifaCfg0 = {
//        EMIFA_FMKS(GBLCTL, EK2RATE, HALFCLK)    |
//        EMIFA_FMKS(GBLCTL, EK2HZ, CLK)          |
//        EMIFA_FMKS(GBLCTL, EK2EN, ENABLE)      |
        EMIFA_FMKS(GBLCTL, BRMODE, MRSTATUS)    |
        EMIFA_FMKS(GBLCTL, NOHOLD, DISABLE)    |
        EMIFA_FMKS(GBLCTL, EK1HZ, HIGHZ)        |
        EMIFA_FMKS(GBLCTL, EK1EN, ENABLE),
//        EMIFA_FMKS(GBLCTL, CLK4EN, ENABLE)    
//        EMIFA_FMKS(GBLCTL, CLK6EN, ENABLE)
        
        EMIFA_FMKS(CECTL, WRSETUP, DEFAULT)    |
        EMIFA_FMKS(CECTL, WRSTRB, DEFAULT)    |
        EMIFA_FMKS(CECTL, WRHLD, DEFAULT)      |
        EMIFA_FMKS(CECTL, RDSETUP, DEFAULT)    |
        EMIFA_FMKS(CECTL, TA, DEFAULT)        |
        EMIFA_FMKS(CECTL, RDSTRB, DEFAULT)    |
        EMIFA_FMKS(CECTL, MTYPE, SDRAM64)      |
        EMIFA_FMKS(CECTL, RDHLD, DEFAULT),
        
        EMIFA_FMKS(CECTL, WRSETUP, OF(7))      |
        EMIFA_FMKS(CECTL, WRSTRB, OF(14))      |
        EMIFA_FMKS(CECTL, WRHLD, OF(2))        |
        EMIFA_FMKS(CECTL, RDSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, TA, OF(2))          |
        EMIFA_FMKS(CECTL, RDSTRB, OF(14))      |
        EMIFA_FMKS(CECTL, MTYPE, ASYNC8)      |
        EMIFA_FMKS(CECTL, RDHLD, OF(1)),        

	    EMIFA_CECTL_DEFAULT,

	    EMIFA_CECTL_DEFAULT,
        
        EMIFA_FMKS(SDCTL, SDBSZ, 4BANKS)      |
        EMIFA_FMKS(SDCTL, SDRSZ, 12ROW)        |
        EMIFA_FMKS(SDCTL, SDCSZ, 8COL)        |
        EMIFA_FMKS(SDCTL, RFEN, ENABLE)        |
        EMIFA_FMKS(SDCTL, INIT, YES)          |
        EMIFA_FMKS(SDCTL, TRCD, OF(1))        |
        EMIFA_FMKS(SDCTL, TRP, OF(1))          |
        EMIFA_FMKS(SDCTL, TRC, OF(5))          |
        EMIFA_FMKS(SDCTL, SLFRFR, DISABLE),
        
        EMIFA_FMKS(SDTIM, XRFR, OF(0))        |
        EMIFA_FMKS(SDTIM, PERIOD, OF(2075)),
        
        EMIFA_FMKS(SDEXT, WR2RD, OF(1))        |
        EMIFA_FMKS(SDEXT, WR2DEAC, OF(3))      |
        EMIFA_FMKS(SDEXT, WR2WR, OF(1))        |
        EMIFA_FMKS(SDEXT, R2WDQM, OF(3))      |
        EMIFA_FMKS(SDEXT, RD2WR, OF(2))        |
        EMIFA_FMKS(SDEXT, RD2DEAC, OF(3))      |
        EMIFA_FMKS(SDEXT, RD2RD, OF(1))        |
        EMIFA_FMKS(SDEXT, THZP, OF(2))        |
        EMIFA_FMKS(SDEXT, TWR, OF(2))          |
        EMIFA_FMKS(SDEXT, TRRD, OF(0))        |
        EMIFA_FMKS(SDEXT, TRAS, OF(6))        |
        EMIFA_FMKS(SDEXT, TCL, OF(1)),          
        
        EMIFA_CESEC_DEFAULT,

        EMIFA_CESEC_DEFAULT,

        EMIFA_CESEC_DEFAULT,

        EMIFA_CESEC_DEFAULT,
    };


I2C_Config DM642IIC_Config = {
    0,  /* master mode,  i2coar;采用主模式   */
    0,  /* no interrupt, i2cimr;只写，不读，采用无中断方式*/
    (50-5), /* scl low time, i2cclkl;  */
    (50-5), /* scl high time,i2cclkh;  */
    2,  /* configure later, i2ccnt;*/
    0,  /* configure later, i2csar;*/
    0x4620, /* master tx mode,     */
            /* i2c runs free,      */
            /* 8-bit data + NACK   */
            /* no repeat mode      */
    (15-1), /* 10MHz clock, i2cpsc  */
};

void DM642_wait(Uint32 delay)
{
    volatile Uint32 i, n;
    
    n = 0;
    for (i = 0; i < delay; i++)
    {
        n = n + 1;
    }
}

/* Spin in a delay loop for delay microseconds */
void DM642_waitusec(Uint32 delay)
{
    DM642_wait(delay * 21);
}


void IIC_write(I2C_Handle hI2C,
              Uint8 devAddress,
              Uint8  subAddress,
              Uint8 data
              )
{             
     

    DM642IIC_Config.i2csar = devAddress;
    I2C_config(hI2C, &DM642IIC_Config);

//	I2C_outOfReset(hI2C);

    while (I2C_bb(hI2C)); 

	/* Generate start condition, starts transmission */
    I2C_start(hI2C);

    /* Wait until ADDRESS transmit is done */
    while(!I2C_xrdy(hI2C));
 
       /* Submit the subAddress for transmit */
    I2C_RSETH(hI2C, I2CDXR, subAddress);

 //   while(I2C_FGETH(hI2C,I2CSTR,NACK));
     
    /* Wait until subAddress transmit is done */
    while(!I2C_xrdy(hI2C));

    /* Submit the data for transmit */ 
    I2C_RSETH(hI2C, I2CDXR,data);  
    
 //   while(I2C_FGETH(hI2C,I2CSTR,NACK));  
    
    /* Generate stop condition */
    I2C_sendStop(hI2C);  

    /* Wait until bus is free */
    while (I2C_bb(hI2C));

	 DM642_waitusec(350);
            
//    I2C_FSETH(hI2C,I2CMDR,IRS,0);  
   
}     

Uint8 IIC_read(I2C_Handle hI2C,
              Uint8 devAddress,
              Uint8  subAddress
              )
{
	Uint8 data;

    DM642IIC_Config.i2csar = devAddress;
	DM642IIC_Config.i2ccnt = 1;
    I2C_config(hI2C, &DM642IIC_Config);


//	I2C_outOfReset(hI2C);
	while (I2C_bb(hI2C));
    
    /* Generate start condition, starts transmission */
    I2C_start(hI2C);

    while(!I2C_xrdy(hI2C));
    
	/* Submit the subAddress for transmit */
    I2C_RSETH(hI2C, I2CDXR, subAddress);

    /* Wait until MSB transmit is done */
//    while(!I2C_xrdy(hI2C));
        
    /* Generate stop condition */
    I2C_sendStop(hI2C);  

    /*从发送到接收需一段时间转换*/
    DM642_waitusec(0x200);

//	DM642IIC_Config.i2cmdr = 0x4420;
//    I2C_config(hI2C, &DM642IIC_Config);
    I2C_RSETH(hI2C, I2CMDR,0x4420);  //configure i2c to receiver mode
 
//	I2C_FSETH(hI2C, I2CMDR, TRX, 0); 

    /* Generate start condition, starts transmission */
    I2C_start(hI2C);
 //   while(I2C_FGETH(hI2C,I2CSTR,ARDY));
    /* Wait until receive is done */
   while(!I2C_rrdy(hI2C));

    /* read data */
    data = I2C_RGETH(hI2C, I2CDRR);
        
    /* Generate stop condition */
    I2C_sendStop(hI2C);  
    
    /* Wait until bus is free */
    while (I2C_bb(hI2C)); 

    /* Short delay for ov7141 to accept command */        
    DM642_waitusec(200);

	return data;
        
}

void main()
{
	I2C_Handle        g_I2C_Handle;           
// 	Uint32 gie;	
	Uint8 read_data;
//	Uint8 dev_read_addr=0x43;
//	Uint8 sub_addr=0x0A;
//	Uint8 *write_buffer=(Uint8 *)(0x10000);
//	Uint8 write_len=8;

    CSL_init();
//	IRQ_globalDisable();
    CHIP_config(&chippercfg);

    DM642_waitusec(10);

    EMIFA_config(&emifaCfg0);	

	g_I2C_Handle = I2C_open(I2C_PORT0,I2C_OPEN_RESET);

//	while(1)
//	{
	  IIC_write(g_I2C_Handle, OV7640_ADDRESS,0x06,0x77);

   read_data=IIC_read(g_I2C_Handle, OV7640_ADDRESS,0x06);
//	}
   read_data++;
}