hfrk_slib.s

Bootload 程序

#ifndef __ASM_LANGUAGE__
#define __ASM_LANGUAGE__
#endif

#include "hfrk_slib.h"

.text

#====================================
# MMU Cache/TLB/etc on/off functions
#====================================

R1_I:     .word    0x00001000 /* 1 << 12 */
R1_C:     .word    0x00000004 /* 1 << 2  */
R1_A:     .word    0x00000002 /* 1 << 1  */
R1_M:     .word    0x00000001
R1_iA:    .word    0x80000000 /* 1 << 31 */
R1_nF:    .word    0x40000000 /* 1 << 30 */

# void MMU_EnableICache(void)
.globl MMU_EnableICache
MMU_EnableICache:
    mrc p15, 0, r0, c1, c0, 0
    orr r0, r0, #R1_I
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_DisableICache(void)
.globl MMU_DisableICache
MMU_DisableICache:
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #R1_I
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_EnableDCache(void)
.globl MMU_EnableDCache
MMU_EnableDCache:
    mrc p15, 0, r0, c1, c0, 0
    orr r0, r0, #R1_C
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_DisableDCache(void)
.globl MMU_DisableDCache
MMU_DisableDCache:
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #R1_C
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_EnableAlignFault(void)
.globl MMU_EnableAlignFault
MMU_EnableAlignFault:
    mrc p15, 0, r0, c1, c0, 0
    orr r0, r0, #R1_A
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_DisableAlignFault(void)
.globl MMU_DisableAlignFault
MMU_DisableAlignFault:
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #R1_A
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_EnableMMU(void)
.globl MMU_EnableMMU
MMU_EnableMMU:
    mrc p15, 0, r0, c1, c0, 0
    orr r0, r0, #R1_M
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_DisableMMU(void)
.globl MMU_DisableMMU
MMU_DisableMMU:
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #R1_M
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_SetFastBusMode(void)
# FCLK:HCLK= 1:1
.globl MMU_SetFastBusMode
MMU_SetFastBusMode:
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #0xc0000000 /* #(R1_iA | R1_nF) */
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_SetAsyncBusMode(void) 
#
# FCLK:HCLK= 1:2
.globl MMU_SetAsyncBusMode
MMU_SetAsyncBusMode:
    mrc p15, 0, r0, c1, c0, 0
    orr r0, r0, #0xc0000000 /* #(R1_nF | R1_iA) */
    mcr p15, 0, r0, c1, c0, 0
    mov pc, lr

# void MMU_CleanInvalidateDCacheIndex(UINT32 index)
.globl MMU_CleanInvalidateDCacheIndex
MMU_CleanInvalidateDCacheIndex:
# r0=index
   mcr p15,0,r0,c7,c14,2
   mov pc, lr

# void MMU_InvalidateICache(void)
.globl MMU_InvalidateICache
MMU_InvalidateICache:
   mcr p15,0,r0,c7,c5,0
   mov pc, lr

# voic MMU_InvalidateTLB(void)
.globl MMU_InvalidateTLB
MMU_InvalidateTLB:
   mcr p15,0,r0,c8,c7,0
   mov pc, lr

# void MMU_SetTTBase(int base)
.globl MMU_SetTTBase
MMU_SetTTBase:
# ro=TTBase
   mcr p15,0,r0,c2,c0,0
   mov pc, lr

# void MMU_SetDomain(int domain)
.globl MMU_SetDomain
MMU_SetDomain:
# ro=domain
   mcr p15,0,r0,c3,c0,0
   mov pc, lr

# void MMU_SetProcessId(U32 pid)
.globl MMU_SetProcessId
MMU_SetProcessId:
# r0= pid
   mcr p15,0,r0,c13,c0,0
   mov pc, lr