📄 platform.h
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// YUV: (01)BIT1611B
// TFT: (51)Lightsonic LTFT018C700 1.75" 280(W) x 220(H) (Delta/LED)
// OSCCLK: 24.576 MHz XTAL
#define DMO04015200 0x04015200UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (01)BIT1611B
// TFT: (52)PVI PW056XS1 5.6" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04015300 0x04015300UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (01)BIT1611B
// TFT: (53)Microtips TAL320240AB0 2.45" 960(W) x 240(H) (Stripe/LED)
// OSCCLK: 24.576 MHz XTAL
#define DMO04015400 0x04015400UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (01)BIT1611B
// TFT: (54)CPT CLAA090WA01 9.0" 1440(W) x 240(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04015800 0x04015800UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (01)BIT1611B
// TFT: (58)TOPPOLY TD025THEB2 2.5" 640(W) x 240(H) (Delta/LED)
// OSCCLK: 24.576 MHz XTAL
#define DMO04041000 0x04041000UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (04)BIT1611B + AD9883A (RGB-Port)
// TFT: (10)INNOLUX AT070TN01 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04042500 0x04042500UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (04)BIT1611B + AD9883A (RGB-Port)
// TFT: (25)LG LB070W02-B11C 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04052500 0x04052500UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (05)BIT1611B + AD9883A (RGB-Port) + SPHE8210A (G-Port)
// TFT: (25)LG LB070W02-B11C 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04060100 0x04060100UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (06)BIT1611B + RGB888 (RGB-Port)
// TFT: (01)AUO A070FW03 7.0" 1440(W)x234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04061000 0x04061000UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (06)BIT1611B + RGB888 (RGB-Port)
// TFT: (10)INNOLUX AT070TN01 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04063200 0x04063200UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (06)BIT1611B + RGB888 (RGB-Port)
// TFT: (32)HANNSTAR HSD050I551-A 5.0" 960(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04063300 0x04063300UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (06)BIT1611B + RGB888 (RGB-Port)
// TFT: (33)HANNSTAR HSD070I651-A 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04064800 0x04064800UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (06)BIT1611B + RGB888 (RGB-Port)
// TFT: (48)SAMSUNG LTP400WQ-F01 4.0" 1440(W) x 272(H) (Stripe/LED)
// OSCCLK: 24.576 MHz XTAL
#define DMO04070100 0x04070100UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (07)BIT1611B + SUNPLUS SPHE8200A+SPV311A/SPHE8210A (G-Port)
// TFT: (01)AUO A070FW03 7.0" 1440(W)x234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04071000 0x04071000UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (07)BIT1611B + SUNPLUS SPHE8200A+SPV311A/SPHE8210A (G-Port)
// TFT: (10)INNOLUX AT070TN01 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04072500 0x04072500UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (07)BIT1611B + SPHE8210A (G-Port)
// TFT: (25)LG LB070W02-B11C 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO04073200 0x04073200UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (07)BIT1611B + SUNPLUS SPHE8200A+SPV311A/SPHE8210A (G-Port)
// TFT: (32)HANNSTAR HSD050I551-A 5.0" 960(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04073300 0x04073300UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (07)BIT1611B + SUNPLUS SPHE8200A+SPV311A/SPHE8210A (G-Port)
// TFT: (33)HANNSTAR HSD070I651-A 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04081000 0x04081000UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (08)BIT1611B + RGB565 (RGB-Port)
// TFT: (10)INNOLUX AT070TN01 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
#define DMO04081001 0x04081001UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (08)BIT1611B + RGB565 (RGB-Port)
// TFT: (10)INNOLUX AT070TN01 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04084800 0x04084800UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (08)BIT1611B + RGB565 (RGB-Port)
// TFT: (48)SAMSUNG LTP400WQ-F01 4.0" 1440(W) x 272(H) (Stripe/LED)
// OSCCLK: 24.576 MHz XTAL
#define DMO04085200 0x04085200UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (08)BIT1611B + RGB565 (RGB-Port)
// TFT: (52)PVI PW056XS1 5.6" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04092500 0x04092500UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (09)BIT1611B + RGB888 (RGB-Port) + ITU656 (G-Port)
// TFT: (25)LG LB070W02-B11C 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04093300 0x04093300UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (09)BIT1611B + RGB888 (RGB-Port) + ITU656 (G-Port)
// TFT: (33)HANNSTAR HSD070I651-A 7.0" 1440(W) x 234(H) (Stripe/CCFL)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04102500 0x04102500UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (10)BIT1611B + RGB565 (RGB-Port) + ITU656 (G-Port)
// TFT: (25)LG LB070W02-B11C 7.0" 480(W) x RGB x 234(H)
// OSCCLK: 24.576 MHz XTAL
// Using VP Brightness and Contrast !
#define DMO04110100 0x04110100UL // Platform: (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
// YUV: (11)BIT1611B + ALi M3330 A1 ITU656/ITU656-Like (G-Port)
// TFT: (01)AUO A070FW03 7.0" 1440(W)x234(H)
// OSCCLK: 24.576 MHz XTAL
#define DMO06015600 0x06015600UL // Platform: (06)(06)PLATFORM_06_VTX0501 (BMW HS 2.1) (v1.00 2005/05/16)
// YUV: (01)BIT1611B
// TFT: (56)AUO A085FW01 8.5" 1440(W)x234(H)
// OSCCLK: 24.576 MHz XTAL
/* ::::::::::::::::::::::::::::::::::::
Project Definition
:::::::::::::::::::::::::::::::::::: */
#ifndef PROJECT
// PROJECT is defined in UV2 file !
#error PLATFORM.H - Invalid PROJECT !
#endif
/* ::::::::::::::::::::::::::::::::::::
Version Configuration
:::::::::::::::::::::::::::::::::::: */
//1 23456789012
#define CODE_COPYRIGHT "\x7D"" 2006 BITEK"
//1234567890123456
#define CODE_DATE_VERSION "2006.08.17 v0.16"
#define CODE_PROJECT (PROJECT ^ 0x0016)
/* ....................................
AUDIO Configuration
.................................... */
#define AUDIO_CFG AUDIO_00_NONE
/* ....................................
EEPROM Configuration
.................................... */
#define EEPROM_CFG EEPROM_TU24C02
#define EEPROM_MAD 0xA0 /* [12]5 */
// EEPROM Write Mode Configuration
#define EEPROM_WRITE_CFG EEPROM_WRITE_BYTE
/* ....................................
IR Configuration
.................................... */
#define IR_CFG IR_00_UNUSE
#define IR_HW_CFG IR_HW_NONE
/* ....................................
KEY Configuration
.................................... */
#define KEY_VR_AIN21 OFF
/* ....................................
MCU Xtal Configuration
.................................... */
#define MCU_XTAL_CFG XTAL_14318KHZ // 14.318 MHz
/* ....................................
Menu Style Configuration
.................................... */
#define MENU_STYLE_CFG MENU_STYLE_SCROLLING_4
/* ....................................
OSD Engine Configuration
.................................... */
#define OSD_CFG OSD_BIT1611B
/* ....................................
OSD Style Configuration
.................................... */
#define OSD_STYLE_CFG OSD_STYLE_TV1
/* ....................................
Platform Configuration
.................................... */
#define PLATFORM_CFG PLATFORM_04_DMO1611S0 // (04)PLATFORM_04_DMO1611S0 (VID502-002-031,BIT1611BS0)
/* ....................................
RGB (ADC/PLL) Configuration
.................................... */
#define RGB_CFG RGB_NONE
#define RGB_MAD 0x98
/* ....................................
TFT-LCD PANEL Configuration
.................................... */
#define TFT_CFG TFT_58_TOPPOLY_TD025THEB2 // (58)TOPPOLY TD025THEB2 2.5" 640(W) x 240(H) (Delta/LED)
/* ....................................
TUNER Configuration
.................................... */
#define TUNER_CFG TUNER_00_NONE
/* ....................................
VP (Video Processor) Configuration
.................................... */
#define VP_CFG VP_BIT1611B
#define VP_XTAL_CFG XTAL_24576KHZ // 24.576 MHz
/* ....................................
YUV (Video Decoder) Configuration
.................................... */
#define YUV_CFG YUV_01_BIT1611B // (01)BIT1611B
#endif /* _PLATFORM_H_ */
/* **********************************************************************
Description:
********************************************************************** */
/* %% End Of File %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */
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