de2_ccd.fit.rpt

这是用于开发带有摄像头的嵌入式系统的一个参考实例。这个工程中是在Altera的DE2开发板上驱动一个Mt9m011的摄像头

; Total PLLs                         ; 1 / 4 ( 25 % )                                ;
+------------------------------------+-----------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                        ;
+------------------------------------------------------+--------------------------------+--------------------------------+
; Option                                               ; Setting                        ; Default Value                  ;
+------------------------------------------------------+--------------------------------+--------------------------------+
; Device                                               ; EP2C35F672C6                   ;                                ;
; SignalProbe signals routed during normal compilation ; Off                            ; Off                            ;
; Use smart compilation                                ; Off                            ; Off                            ;
; Router Timing Optimization Level                     ; Normal                         ; Normal                         ;
; Placement Effort Multiplier                          ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                             ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                                 ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                          ; Off                            ; Off                            ;
; PowerPlay Power Optimization                         ; Normal compilation             ; Normal compilation             ;
; Optimize Timing                                      ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing           ; On                             ; On                             ;
; Limit to One Fitting Attempt                         ; Off                            ; Off                            ;
; Final Placement Optimizations                        ; Automatically                  ; Automatically                  ;
; Fitter Aggressive Routability Optimizations          ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                        ; 1                              ; 1                              ;
; PCI I/O                                              ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                                ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                            ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                   ; Off                            ; Off                            ;
; Auto Packed Registers -- Stratix II/Cyclone II       ; Auto                           ; Auto                           ;
; Auto Delay Chains                                    ; On                             ; On                             ;
; Auto Merge PLLs                                      ; On                             ; On                             ;
; Fitter Effort                                        ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                      ; Normal                         ; Normal                         ;
; Auto Global Clock                                    ; On                             ; On                             ;
; Auto Global Register Control Signals                 ; On                             ; On                             ;
+------------------------------------------------------+--------------------------------+--------------------------------+


+--------------------------------------------------------------------+
; Fitter Device Options                                              ;
+----------------------------------------------+---------------------+
; Option                                       ; Setting             ;
+----------------------------------------------+---------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                 ;
; Enable device-wide reset (DEV_CLRn)          ; Off                 ;
; Enable device-wide output enable (DEV_OE)    ; Off                 ;
; Enable INIT_DONE output                      ; Off                 ;
; Configuration scheme                         ; Active Serial       ;
; Error detection CRC                          ; Off                 ;
; Reserve ASDO pin after configuration.        ; As input tri-stated ;
; Reserve all unused pins                      ; As input tri-stated ;
; Base pin-out file on sameframe device        ; Off                 ;
+----------------------------------------------+---------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Netlist Optimizations                                                                                                         ;
+--------------+-----------------+------------------+--------------------------------+-----------+------------------+------------------+
; Node         ; Action          ; Operation        ; Reason                         ; Node Port ; Destination Node ; Destination Port ;
+--------------+-----------------+------------------+--------------------------------+-----------+------------------+------------------+
; rCCD_DATA[0] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[0]        ; COMBOUT          ;
; rCCD_DATA[1] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[1]        ; COMBOUT          ;
; rCCD_DATA[2] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[5]        ; COMBOUT          ;
; rCCD_DATA[3] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[3]        ; COMBOUT          ;
; rCCD_DATA[4] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[2]        ; COMBOUT          ;
; rCCD_DATA[5] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[4]        ; COMBOUT          ;
; rCCD_DATA[6] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[6]        ; COMBOUT          ;
; rCCD_DATA[7] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[7]        ; COMBOUT          ;
; rCCD_DATA[8] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[8]        ; COMBOUT          ;
; rCCD_DATA[9] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[9]        ; COMBOUT          ;
; rCCD_FVAL    ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[13]       ; COMBOUT          ;
; rCCD_LVAL    ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT    ; GPIO_1[12]       ; COMBOUT          ;
+--------------+-----------------+------------------+--------------------------------+-----------+------------------+------------------+


+------------------+
; Fitter Equations ;