sfr245.h

Mitsubishi M30245 SampleCode

#define		ilvl0_ta0ic		ta0ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ta0ic		ta0ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ta0ic		ta0ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ta0ic		ta0ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART3 receive interrupt control register
------------------------------------------------------*/
union	byte_def	s3ric_addr;
#define		s3ric		s3ric_addr.byte

#define		ilvl0_s3ric		s3ric_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s3ric		s3ric_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s3ric		s3ric_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s3ric		s3ric_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 USB suspend interrupt control register
------------------------------------------------------*/
union	byte_def   suspic_addr;
#define		suspic		suspic_addr.byte

#define		ilvl0_suspic 	suspic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_suspic 	suspic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_suspic 	suspic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_suspic	 	suspic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 Timer A3 interrupt control register
------------------------------------------------------*/
union	byte_def	ta3ic_addr;
#define		ta3ic		ta3ic_addr.byte

#define		ilvl0_ta3ic		ta3ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ta3ic		ta3ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ta3ic		ta3ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ta3ic		ta3ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 USB Resume interrupt control register
------------------------------------------------------*/
union	byte_def	rsmic_addr;
#define		rsmic		rsmic_addr.byte

#define		ilvl0_rsmic		rsmic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_rsmic		rsmic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_rsmic		rsmic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_rsmic		rsmic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 Timer A4 interrupt control register
------------------------------------------------------*/
union	byte_def	ta4ic_addr;
#define		ta4ic		ta4ic_addr.byte

#define		ilvl0_ta4ic		ta4ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ta4ic		ta4ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ta4ic		ta4ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ta4ic		ta4ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 Reset interrupt control register
------------------------------------------------------*/
union	byte_def	rstic_addr;
#define		rstic	rstic_addr.byte	

#define		ilvl0_rstic		rstic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_rstic		rstic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_rstic		rstic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_rstic		rstic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 USB start of frame interrupt control register
------------------------------------------------------*/
union	byte_def	sofic_addr;
#define		sofic		sofic_addr.byte

#define		ilvl0_sofic		sofic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_sofic		sofic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_sofic		sofic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_sofic		sofic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 USB Vbus detect interrupt control register
------------------------------------------------------*/
union	byte_def   vbsic_addr;
#define		vbsic		vbsic_addr.byte

#define		ilvl0_vbsic		vbsic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_vbsic		vbsic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_vbsic		vbsic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_vbsic		vbsic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 USB function interrupt control register
------------------------------------------------------*/
union	byte_def   usbfic_addr;
#define		usbfic		usbfic_addr.byte

#define		ilvl0_usbfic	usbfic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_usbfic	usbfic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_usbfic	usbfic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_usbfic		usbfic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 INT2 interrupt control register
------------------------------------------------------*/
union	byte_def	int2ic_addr;
#define		int2ic		int2ic_addr.byte

#define		ilvl0_int2ic	int2ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_int2ic	int2ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_int2ic	int2ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_int2ic		int2ic_addr.bit.b3	/* Interrupt request bit */
#define		pol_int2ic		int2ic_addr.bit.b4	/* Interrupt polarity select bit */

/*------------------------------------------------------
	 INT0 interrupt control register
------------------------------------------------------*/
union	byte_def	int0ic_addr;
#define		int0ic		int0ic_addr.byte

#define		ilvl0_int0ic	int0ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_int0ic	int0ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_int0ic	int0ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_int0ic		int0ic_addr.bit.b3	/* Interrupt request bit */
#define		pol_int0ic		int0ic_addr.bit.b4	/* Interrupt polarity select bit */

/*------------------------------------------------------
	DMA2 source pointer
------------------------------------------------------*/
union dword_def sar2_addr;
#define		sar2	sar2_addr.dword			/* DMA2 source pointer 32 bit */
#define		sar2l	sar2_addr.byte.low		/* DMA2 source pointer low  8 bit */
#define		sar2m	sar2_addr.byte.mid		/* DMA2 source pointer mid  8 bit */
#define		sar2h	sar2_addr.byte.high		/* DMA2 source pointer high 8 bit */

/*------------------------------------------------------
	DMA2 destination pointer
------------------------------------------------------*/
union dword_def dar2_addr;
#define		dar2	dar2_addr.dword			/* DMA2 destination pointer 32 bit */
#define		dar2l	dar2_addr.byte.low     	/* DMA2 destination pointer low  8 bit */
#define		dar2m	dar2_addr.byte.mid     	/* DMA2 destination pointer mid  8 bit */
#define		dar2h	dar2_addr.byte.high    	/* DMA2 destination pointer high 8 bit */

/*------------------------------------------------------
	DMA2 transfer counter
------------------------------------------------------*/
union word_def tcr2_addr;
#define		tcr2	tcr2_addr.word	 		/* DMA2 transfer counter 16 bit */
#define		tcr2l	tcr2_addr.byte.low		/* DMA2 transfer counter low  8 bit */
#define		tcr2h	tcr2_addr.byte.high		/* DMA2 transfer counter high 8 bit */

/*------------------------------------------------------
	 DMA2 control register
------------------------------------------------------*/
union byte_def dm2con_addr;
#define		dm2con			dm2con_addr.byte

#define		dmbit_d2	dm2con_addr.bit.b0	/* Transfer unit bit select bit */
#define		dmasl_d2	dm2con_addr.bit.b1	/* Repeat transfer mode select bit */
#define		dmas_d2		dm2con_addr.bit.b2	/* DMA request bit */
#define		dmae_d2		dm2con_addr.bit.b3	/* DMA enable bit */
#define		dsd_d2		dm2con_addr.bit.b4	/* Source address direction select bit */
#define		dad_d2		dm2con_addr.bit.b5	/* Destination addressdirection select bit */

/*------------------------------------------------------
	DMA3 source pointer
------------------------------------------------------*/
union dword_def sar3_addr;
#define		sar3	sar3_addr.dword			/* DMA3 source pointer 32 bit */
#define		sar3l	sar3_addr.byte.low		/* DMA3 source pointer low  8 bit */
#define		sar3m	sar3_addr.byte.mid		/* DMA3 source pointer mid  8 bit */
#define		sar3h	sar3_addr.byte.high		/* DMA3 source pointer high 8 bit */

/*------------------------------------------------------
	DMA3 destination pointer
------------------------------------------------------*/
union dword_def dar3_addr;
#define		dar3	dar3_addr.dword			/* DMA3 destination pointer 32 bit */
#define		dar3l	dar3_addr.byte.low     	/* DMA3 destination pointer low  8 bit */
#define		dar3m	dar3_addr.byte.mid     	/* DMA3 destination pointer mid  8 bit */
#define		dar3h	dar3_addr.byte.high    	/* DMA3 destination pointer high 8 bit */

/*------------------------------------------------------
	DMA3 transfer counter
------------------------------------------------------*/
union word_def tcr3_addr;
#define		tcr3	tcr3_addr.word	 		/* DMA3 transfer counter 16 bit */
#define		tcr3l	tcr3_addr.byte.low		/* DMA3 transfer counter low  8 bit */
#define		tcr3h	tcr3_addr.byte.high		/* DMA3 transfer counter high 8 bit */

/*------------------------------------------------------
	 DMA3 control register
------------------------------------------------------*/
union byte_def dm3con_addr;
#define		dm3con			dm3con_addr.byte

#define		dmbit_d3	dm3con_addr.bit.b0	/* Transfer unit bit select bit */
#define		dmasl_d3	dm3con_addr.bit.b1	/* Repeat transfer mode select bit */
#define		dmas_d3		dm3con_addr.bit.b2	/* DMA request bit */
#define		dmae_d3		dm3con_addr.bit.b3	/* DMA enable bit */
#define		dsd_d3		dm3con_addr.bit.b4	/* Source address direction select bit */
#define		dad_d3		dm3con_addr.bit.b5	/* Destination addressdirection select bit */

/*------------------------------------------------------
	USB function address register
------------------------------------------------------*/
union word_def usba_addr;
#define		usba	usba_addr.word

/*------------------------------------------------------
	USB power management register
------------------------------------------------------*/
union word_def usbpm_addr;
#define		usbpm	usbpm_addr.word

#define		suspend	usbpm_addr.bit.b0	/* USB suspend detection flag */
#define		wakeup	usbpm_addr.bit.b1	/* USB remote wake-up bit */

/*------------------------------------------------------
	USB interrupt status register
------------------------------------------------------*/
union word_def usbis_addr;
#define		usbis	usbis_addr.word
#define		usbisl	usbis_addr.byte.low		/* low byte */
#define		usbish	usbis_addr.byte.high	/* high byte */

#define		intst0	usbis_addr.bit.b0	/* USB endpoint 1 IN int status flag */
#define		intst1	usbis_addr.bit.b1	/* USB endpoint 1 OUT int status flag */
#define		intst2	usbis_addr.bit.b2	/* USB endpoint 2 IN int status flag */
#define		intst3	usbis_addr.bit.b3	/* USB endpoint 2 OUT int status flag */
#define		intst4	usbis_addr.bit.b4	/* USB endpoint 3 IN int status flag */
#define		intst5	usbis_addr.bit.b5	/* USB endpoint 3 OUT int status flag */
#define		intst6	usbis_addr.bit.b6	/* USB endpoint 4 IN int status flag */
#define		intst7	usbis_addr.bit.b7	/* USB endpoint 4 OUT int status flag */
#define		intst8	usbis_addr.bit.b8	/* Error interrupt status flag */

/*------------------------------------------------------
	USB interrupt clear register
------------------------------------------------------*/
union word_def usbic_addr;
#define		usbic	usbic_addr.word
#define		usbicl	usbic_addr.byte.low		/* low byte */
#define		usbich	usbic_addr.byte.high	/* high byte */

#define		intcl0	usbic_addr.bit.b0	/* Clear endpoint 1 IN int status flag */
#define		intcl1	usbic_addr.bit.b1	/* Clear endpoint 1 OUT int status flag */
#define		intcl2	usbic_addr.bit.b2	/* Clear endpoint 2 IN int status flag */
#define		intcl3	usbic_addr.bit.b3	/* Clear endpoint 2 OUT int status flag */
#define		intcl4	usbic_addr.bit.b4	/* Clear endpoint 3 IN int status flag */
#define		intcl5	usbic_addr.bit.b5	/* Clear endpoint 3 OUT int status flag */
#define		intcl6	usbic_addr.bit.b6	/* Clear endpoint 4 IN int status flag */
#define		intcl7	usbic_addr.bit.b7	/* Clear endpoint 4 OUT int status flag */
#define		intcl8	usbic_addr.bit.b8	/* Clear Error interrupt status flag */

/*------------------------------------------------------
	USB interrupt enable register