sfr245.h

Mitsubishi M30245 SampleCode

#define		dmae_d0		dm0con_addr.bit.b3	/* DMA enable bit */
#define		dsd_d0		dm0con_addr.bit.b4	/* Source address direction select bit */
#define		dad_d0		dm0con_addr.bit.b5	/* Destination addressdirection select bit */

/*------------------------------------------------------
	DMA1 source pointer
------------------------------------------------------*/
union dword_def sar1_addr;
#define		sar1	sar1_addr.dword			/* DMA1 source pointer 32 bit */
#define		sar1l	sar1_addr.byte.low     	/* DMA1 source pointer low  8 bit */
#define		sar1m	sar1_addr.byte.mid     	/* DMA1 source pointer mid  8 bit */
#define		sar1h	sar1_addr.byte.high    	/* DMA1 source pointer high 8 bit */

/*------------------------------------------------------
	DMA1 destination pointer
------------------------------------------------------*/
union dword_def dar1_addr;
#define		dar1	dar1_addr.dword			/* DMA1 destination pointer 32 bit */
#define		dar1l	dar1_addr.byte.low      /* DMA1 destination pointer low  8 bit */
#define		dar1m	dar1_addr.byte.mid     	/* DMA1 destination pointer mid  8 bit */
#define		dar1h	dar1_addr.byte.high     /* DMA1 destination pointer high 8 bit */

/*------------------------------------------------------
	DMA1 transfer counter
------------------------------------------------------*/
union word_def tcr1_addr;
#define		tcr1	tcr1_addr.word			/* DMA1 transfer counter 16 bit */
#define		tcr1l	tcr1_addr.byte.low  	/* DMA1 transfer counter low  8 bit */
#define		tcr1h	tcr1_addr.byte.high 	/* DMA1 transfer counter high 8 bit */

/*------------------------------------------------------
	 DMA1 control register
------------------------------------------------------*/
union byte_def dm1con_addr;
#define		dm1con			dm1con_addr.byte

#define		dmbit_d1  	dm1con_addr.bit.b0	/* Transfer unit bit select bit */
#define		dmasl_d1  	dm1con_addr.bit.b1	/* Repeat transfer mode select bit */
#define		dmas_d1		dm1con_addr.bit.b2	/* DMA request bit */
#define		dmae_d1		dm1con_addr.bit.b3	/* DMA enable bit */
#define		dsd_d1		dm1con_addr.bit.b4	/* Source address direction select bit */
#define		dad_d1		dm1con_addr.bit.b5	/* Destination address direction select bit */

/*------------------------------------------------------
	 Key input interrupt control register
------------------------------------------------------*/
union	byte_def	kupic_addr;
#define		kupic		kupic_addr.byte

#define		ilvl0_kupic		kupic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_kupic		kupic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_kupic		kupic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_kupic		kupic_addr.bit.b3	/* Int request bit */

/*------------------------------------------------------
	 UART2 receive interrupt control register
------------------------------------------------------*/
union	byte_def	s2ric_addr;
#define		s2ric		s2ric_addr.byte

#define		ilvl0_s2ric		s2ric_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s2ric		s2ric_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s2ric		s2ric_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s2ric		s2ric_addr.bit.b3	/* Int request bit */

/*------------------------------------------------------
	 UART1/3 bus collision interrupt control register
------------------------------------------------------*/
union	byte_def	s13bcnic_addr;
#define		s13bcnic		s13bcnic_addr.byte

#define		ilvl0_s13bcnic	s13bcnic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s13bcnic	s13bcnic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s13bcnic	s13bcnic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s13bcnic		s13bcnic_addr.bit.b3	/* Int request bit */
	
/*------------------------------------------------------
	 INT1 interrupt control register
------------------------------------------------------*/
union	byte_def   int1ic_addr;
#define		int1ic		int1ic_addr.byte

#define		ilvl0_int1ic	int1ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_int1ic	int1ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_int1ic	int1ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_int1ic		int1ic_addr.bit.b3	/* Interrupt request bit */
#define		pol_int1ic		int1ic_addr.bit.b4	/* Interrupt polarity select bit */

/*------------------------------------------------------
	 Timer A1 interrupt control register
------------------------------------------------------*/
union	byte_def	ta1ic_addr;
#define		ta1ic		ta1ic_addr.byte

#define		ilvl0_ta1ic		ta1ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ta1ic		ta1ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ta1ic		ta1ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ta1ic		ta1ic_addr.bit.b3	/* Interrupt request bit */
								
/*------------------------------------------------------
	 USB Endpoint 0 interrupt control register
------------------------------------------------------*/
union	byte_def	ep0ic_addr;
#define		ep0ic		ep0ic_addr.byte

#define		ilvl0_ep0ic		ep0ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ep0ic		ep0ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ep0ic		ep0ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ep0ic		ep0ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 Timer A2 interrupt control register
------------------------------------------------------*/
union	byte_def	ta2ic_addr;
#define		ta2ic		ta2ic_addr.byte

#define		ilvl0_ta2ic		ta2ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_ta2ic		ta2ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_ta2ic		ta2ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_ta2ic		ta2ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART1 receive interrupt control register
------------------------------------------------------*/
union	byte_def   s1ric_addr;
#define		s1ric		s1ric_addr.byte

#define		ilvl0_s1ric		s1ric_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s1ric		s1ric_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s1ric		s1ric_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s1ric		s1ric_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART0/2 bus collision interrupt control register
------------------------------------------------------*/
union	byte_def	s02bcnic_addr;
#define		s02bcnic		s02bcnic_addr.byte

#define		ilvl0_s02bcnic	s02bcnic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s02bcnic	s02bcnic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s02bcnic	s02bcnic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s02bcnic		s02bcnic_addr.bit.b3	/* Int request bit */
	
/*------------------------------------------------------
	 UART0 receive interrupt control register
------------------------------------------------------*/
union	byte_def	s0ric_addr;
#define		s0ric		s0ric_addr.byte

#define		ilvl0_s0ric		s0ric_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s0ric		s0ric_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s0ric		s0ric_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s0ric		s0ric_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 A/D interrupt control register
------------------------------------------------------*/
union	byte_def	adic_addr;
#define		adic		adic_addr.byte

#define		ilvl0_adic		adic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_adic		adic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_adic		adic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_adic			adic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 DMA0 interrupt control register
------------------------------------------------------*/
union	byte_def	dm0ic_addr;
#define		dm0ic		dm0ic_addr.byte

#define		ilvl0_dm0ic		dm0ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_dm0ic		dm0ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_dm0ic		dm0ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_dm0ic		dm0ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART3 transmit interrupt control register
------------------------------------------------------*/
union	byte_def	s3tic_addr;
#define		s3tic		s3tic_addr.byte

#define		ilvl0_s3tic		s3tic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s3tic		s3tic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s3tic		s3tic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s3tic		s3tic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 DMA1 interrupt control register
------------------------------------------------------*/
union	byte_def	dm1ic_addr;
#define		dm1ic		dm1ic_addr.byte

#define		ilvl0_dm1ic		dm1ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_dm1ic		dm1ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_dm1ic		dm1ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_dm1ic		dm1ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART2 transmit interrupt control register
------------------------------------------------------*/
union	byte_def	s2tic_addr;
#define		s2tic		s2tic_addr.byte

#define		ilvl0_s2tic		s2tic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s2tic		s2tic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s2tic		s2tic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s2tic		s2tic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 DMA2 interrupt control register
------------------------------------------------------*/
union	byte_def	dm2ic_addr;
#define		dm2ic		dm2ic_addr.byte

#define		ilvl0_dm2ic		dm2ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_dm2ic		dm2ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_dm2ic		dm2ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_dm2ic		dm2ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART1 transmit interrupt control register
------------------------------------------------------*/
union	byte_def   s1tic_addr;
#define		s1tic		s1tic_addr.byte

#define		ilvl0_s1tic		s1tic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s1tic		s1tic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s1tic		s1tic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s1tic		s1tic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 DMA3 interrupt control register
------------------------------------------------------*/
union	byte_def	dm3ic_addr;
#define		dm3ic		dm3ic_addr.byte

#define		ilvl0_dm3ic		dm3ic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_dm3ic		dm3ic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_dm3ic		dm3ic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_dm3ic		dm3ic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 UART0 transmit interrupt control register
------------------------------------------------------*/
union	byte_def	s0tic_addr;
#define		s0tic		s0tic_addr.byte

#define		ilvl0_s0tic		s0tic_addr.bit.b0	/* Int priority level select bit0 */
#define		ilvl1_s0tic		s0tic_addr.bit.b1	/* Int priority level select bit1 */
#define		ilvl2_s0tic		s0tic_addr.bit.b2	/* Int priority level select bit2 */
#define		ir_s0tic		s0tic_addr.bit.b3	/* Interrupt request bit */

/*------------------------------------------------------
	 Timer A0 interrupt control register
------------------------------------------------------*/
union	byte_def	ta0ic_addr;
#define		ta0ic		ta0ic_addr.byte