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📄 ch1003.mdl

📁 《Matlab7.x系统建模与仿真》光盘源码
💻 MDL
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		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
	      }
	      Version		      "1.0.4"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Ground
    }
    Block {
      BlockType		      Inport
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Reference
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "ch1003"
    Location		    [229, 308, 744, 588]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "Bernoulli Binary\nGenerator"
      Ports		      [0, 1]
      Position		      [25, 28, 105, 72]
      FontName		      "Arial"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      on
      P			      "0.5"
      seed		      "xInitialSeed"
      Ts		      "xSampleTime"
      frameBased	      off
      sampPerFrame	      "1"
      orient		      off
    }
    Block {
      BlockType		      Reference
      Name		      "Bit to Integer\nConverter1"
      Ports		      [1, 1]
      Position		      [195, 178, 275, 222]
      SourceBlock	      "commutil2/Bit to Integer\nConverter"
      SourceType	      "Bit to Integer Converter"
      nbits		      "2"
    }
    Block {
      BlockType		      Reference
      Name		      "Error Rate\nCalculation"
      Ports		      [2]
      Position		      [395, 162, 470, 213]
      SourceBlock	      "commsink2/Error Rate\nCalculation"
      SourceType	      "Error Rate Calculation"
      N			      "xReceiveDelay"
      st_delay		      "0"
      cp_mode		      "Entire frame"
      subframe		      "[]"
      PMode		      "Workspace"
      WsName		      "xErrorRate"
      RsMode2		      off
      stop		      off
      numErr		      "100"
      maxBits		      "1e6"
    }
    Block {
      BlockType		      Reference
      Name		      "QPSK\nDemodulator\nBaseband"
      Ports		      [1, 1]
      Position		      [400, 25, 475, 75]
      SourceBlock	      "commdigbbndpm2/QPSK\nDemodulator\nBaseband"
      SourceType	      "QPSK Demodulator Baseband"
      ShowPortLabels	      on
      OutType		      "Integer"
      Dec		      "Binary"
      Ph		      "xPhaseOffset"
      numSamp		      "xSamplesPerSymbol"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Subsystem"
      Ports		      [1, 1]
      Position		      [215, 20, 255, 80]
      TreatAsAtomicUnit	      off
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      MaskIconFrame	      on
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      System {
	Name			"Subsystem"
	Location		[289, 309, 654, 409]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [25, 45, 55, 59]
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "AWGN\nChannel"
	  Ports			  [1, 1]
	  Position		  [205, 29, 285, 71]
	  SourceBlock		  "commchan2/AWGN\nChannel"
	  SourceType		  "AWGN Channel"
	  ShowPortLabels	  on
	  seed			  "67"
	  noiseMode		  "Signal to noise ratio  (SNR)"
	  EbNodB		  "10"
	  EsNodB		  "10"
	  SNRdB			  "xSNR"
	  bitsPerSym		  "1"
	  Ps			  "1"
	  Tsym			  "1"
	  variance		  "1"
	}
	Block {
	  BlockType		  Reference
	  Name			  "QPSK\nModulator\nBaseband"
	  Ports			  [1, 1]
	  Position		  [90, 26, 165, 74]
	  SourceBlock		  "commdigbbndpm2/QPSK\nModulator\nBaseband"
	  SourceType		  "QPSK Modulator Baseband"
	  ShowPortLabels	  on
	  InType		  "Bit"
	  Enc			  "Gray"
	  Ph			  "xPhaseOffset"
	  numSamp		  "xSamplesPerSymbol"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [310, 45, 340, 59]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "QPSK\nModulator\nBaseband"
	  SrcPort		  1
	  DstBlock		  "AWGN\nChannel"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "QPSK\nModulator\nBaseband"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "AWGN\nChannel"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "Bernoulli Binary\nGenerator"
      SrcPort		      1
      Points		      [15, 0]
      Branch {
	Points			[0, 150]
	DstBlock		"Bit to Integer\nConverter1"
	DstPort			1
      }
      Branch {
	DstBlock		"Subsystem"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Subsystem"
      SrcPort		      1
      DstBlock		      "QPSK\nDemodulator\nBaseband"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Bit to Integer\nConverter1"
      SrcPort		      1
      DstBlock		      "Error Rate\nCalculation"
      DstPort		      2
    }
    Line {
      SrcBlock		      "QPSK\nDemodulator\nBaseband"
      SrcPort		      1
      Points		      [0, 80; -165, 0; 0, 45]
      DstBlock		      "Error Rate\nCalculation"
      DstPort		      1
    }
    Annotation {
      Name		      "QPSK"
      Position		      [30, 162]
      FontName		      "Arial"
      FontSize		      16
      FontWeight	      "bold"
    }
  }
}

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