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📄 bulkloop.lst

📁 this bulk loopback firmware based on the firmware frameworks. Loops back EP2OUT to EP6IN and EP4OU
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C51 COMPILER V7.07   BULKLOOP                                                              06/08/2007 15:20:10 PAGE 1   


C51 COMPILER V7.07, COMPILATION OF MODULE BULKLOOP
OBJECT MODULE PLACED IN bulkloop.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE bulkloop.c DEBUG OBJECTEXTEND

stmt level    source

   1          //-----------------------------------------------------------------------------
   2          //   File:      bulkloop.c
   3          //   Contents:  Hooks required to implement USB peripheral function.
   4          //
   5          // $Archive: /USB/Examples/FX2LP/bulkloop/bulkloop.c $
   6          // $Date: 3/23/05 2:55p $
   7          // $Revision: 4 $
   8          //
   9          //
  10          //-----------------------------------------------------------------------------
  11          // Copyright 2003, Cypress Semiconductor Corporation
  12          //-----------------------------------------------------------------------------
  13          #pragma NOIV               // Do not generate interrupt vectors
  14          
  15          #include "fx2.h"
  16          #include "fx2regs.h"
  17          #include "syncdly.h"            // SYNCDELAY macro
  18          
  19          extern BOOL GotSUD;             // Received setup data flag
  20          extern BOOL Sleep;
  21          extern BOOL Rwuen;
  22          extern BOOL Selfpwr;
  23          
  24          BYTE Configuration;             // Current configuration
  25          BYTE AlternateSetting;          // Alternate settings
  26          
  27          #define VR_NAKALL_ON    0xD0
  28          #define VR_NAKALL_OFF   0xD1
  29          
  30          //-----------------------------------------------------------------------------
  31          // Task Dispatcher hooks
  32          //   The following hooks are called by the task dispatcher.
  33          //-----------------------------------------------------------------------------
  34          
  35          void TD_Init(void)             // Called once at startup
  36          {
  37   1         // set the CPU clock to 48MHz
  38   1         CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
  39   1      
  40   1         // set the slave FIFO interface to 48MHz
  41   1         IFCONFIG |= 0x40;
  42   1      
  43   1        // Registers which require a synchronization delay, see section 15.14
  44   1        // FIFORESET        FIFOPINPOLAR
  45   1        // INPKTEND         OUTPKTEND
  46   1        // EPxBCH:L         REVCTL
  47   1        // GPIFTCB3         GPIFTCB2
  48   1        // GPIFTCB1         GPIFTCB0
  49   1        // EPxFIFOPFH:L     EPxAUTOINLENH:L
  50   1        // EPxFIFOCFG       EPxGPIFFLGSEL
  51   1        // PINFLAGSxx       EPxFIFOIRQ
  52   1        // EPxFIFOIE        GPIFIRQ
  53   1        // GPIFIE           GPIFADRH:L
  54   1        // UDMACRCH:L       EPxGPIFTRIG
  55   1        // GPIFTRIG
C51 COMPILER V7.07   BULKLOOP                                                              06/08/2007 15:20:10 PAGE 2   

  56   1        
  57   1        // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  58   1        //      ...these have been replaced by GPIFTC[B3:B0] registers
  59   1      
  60   1        // default: all endpoints have their VALID bit set
  61   1        // default: TYPE1 = 1 and TYPE0 = 0 --> BULK  
  62   1        // default: EP2 and EP4 DIR bits are 0 (OUT direction)
  63   1        // default: EP6 and EP8 DIR bits are 1 (IN direction)
  64   1        // default: EP2, EP4, EP6, and EP8 are double buffered
  65   1      
  66   1        // we are just using the default values, yes this is not necessary...
  67   1        EP1OUTCFG = 0xA0;
  68   1        EP1INCFG = 0xA0;
  69   1        SYNCDELAY;                    // see TRM section 15.14
  70   1        EP2CFG = 0xA2;
  71   1        SYNCDELAY;                    
  72   1        EP4CFG = 0xA0;
  73   1        SYNCDELAY;                    
  74   1        EP6CFG = 0xE2;
  75   1        SYNCDELAY;                    
  76   1        EP8CFG = 0xE0;
  77   1      
  78   1        // out endpoints do not come up armed
  79   1        
  80   1        // since the defaults are double buffered we must write dummy byte counts twice
  81   1        SYNCDELAY;                    
  82   1        EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
  83   1        SYNCDELAY;                    
  84   1        EP2BCL = 0x80;
  85   1        SYNCDELAY;                    
  86   1        EP4BCL = 0x80;                // arm EP4OUT by writing byte count w/skip.
  87   1        SYNCDELAY;                    
  88   1        EP4BCL = 0x80;    
  89   1      
  90   1        // enable dual autopointer feature
  91   1        AUTOPTRSETUP |= 0x01;
  92   1      
  93   1      }
  94          
  95          
  96          void TD_Poll(void)              // Called repeatedly while the device is idle
  97          {
  98   1        WORD i;
  99   1        WORD count;
 100   1      
 101   1        if(!(EP2468STAT & bmEP2EMPTY))
 102   1        { // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
 103   2           if(!(EP2468STAT & bmEP6FULL))
 104   2           {  // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
 105   3              APTR1H = MSB( &EP2FIFOBUF );
 106   3              APTR1L = LSB( &EP2FIFOBUF );
 107   3      
 108   3              AUTOPTRH2 = MSB( &EP6FIFOBUF );
 109   3              AUTOPTRL2 = LSB( &EP6FIFOBUF );
 110   3      
 111   3              count = (EP2BCH << 8) + EP2BCL;
 112   3      
 113   3              // loop EP2OUT buffer data to EP6IN
 114   3              for( i = 0x0000; i < count; i++ )
 115   3              {
 116   4                 // setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s)
 117   4                 EXTAUTODAT2 = EXTAUTODAT1;
C51 COMPILER V7.07   BULKLOOP                                                              06/08/2007 15:20:10 PAGE 3   

 118   4              }
 119   3              EP6BCH = EP2BCH;  
 120   3              SYNCDELAY;  
 121   3              EP6BCL = EP2BCL;        // arm EP6IN
 122   3              SYNCDELAY;                    
 123   3              EP2BCL = 0x80;          // re(arm) EP2OUT
 124   3           }
 125   2        }
 126   1      
 127   1        if(!(EP2468STAT & bmEP4EMPTY))
 128   1        { // check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
 129   2           if(!(EP2468STAT & bmEP8FULL))
 130   2           {  // check EP8 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
 131   3              APTR1H = MSB( &EP4FIFOBUF );
 132   3              APTR1L = LSB( &EP4FIFOBUF );
 133   3      
 134   3              AUTOPTRH2 = MSB( &EP8FIFOBUF );
 135   3              AUTOPTRL2 = LSB( &EP8FIFOBUF );
 136   3      
 137   3              count = (EP4BCH << 8) + EP4BCL;
 138   3      
 139   3              // loop EP4OUT buffer data to EP8IN
 140   3              for( i = 0x0000; i < count; i++ )
 141   3              {
 142   4                 // setup to transfer EP4OUT buffer to EP8IN buffer using AUTOPOINTER(s)
 143   4                 EXTAUTODAT2 = EXTAUTODAT1;
 144   4              }
 145   3              EP8BCH = EP4BCH;  
 146   3              SYNCDELAY;  
 147   3              EP8BCL = EP4BCL;        // arm EP8IN
 148   3              SYNCDELAY;                    
 149   3              EP4BCL = 0x80;          // re(arm) EP4OUT
 150   3           }
 151   2        }
 152   1      }
 153          
 154          BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
 155          {
 156   1         return(TRUE);
 157   1      }
 158          
 159          BOOL TD_Resume(void)          // Called after the device resumes
 160          {
 161   1         return(TRUE);
 162   1      }
 163          
 164          //-----------------------------------------------------------------------------
 165          // Device Request hooks
 166          //   The following hooks are called by the end point 0 device request parser.
 167          //-----------------------------------------------------------------------------
 168          
 169          BOOL DR_GetDescriptor(void)
 170          {
 171   1         return(TRUE);
 172   1      }
 173          
 174          BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
 175          {
 176   1         Configuration = SETUPDAT[2];
 177   1         return(TRUE);            // Handled by user code
 178   1      }
 179          
C51 COMPILER V7.07   BULKLOOP                                                              06/08/2007 15:20:10 PAGE 4   

 180          BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
 181          {
 182   1         EP0BUF[0] = Configuration;
 183   1         EP0BCH = 0;
 184   1         EP0BCL = 1;
 185   1         return(TRUE);            // Handled by user code
 186   1      }
 187          
 188          BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
 189          {
 190   1         AlternateSetting = SETUPDAT[2];
 191   1         return(TRUE);            // Handled by user code
 192   1      }
 193          
 194          BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
 195          {
 196   1         EP0BUF[0] = AlternateSetting;
 197   1         EP0BCH = 0;
 198   1         EP0BCL = 1;
 199   1         return(TRUE);            // Handled by user code
 200   1      }
 201          
 202          BOOL DR_GetStatus(void)
 203          {
 204   1         return(TRUE);
 205   1      }
 206          
 207          BOOL DR_ClearFeature(void)

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