📄 mc1319x.h
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/* Interface an Atmel AVR MCU with Freescales MC1319x ZigBee chip */
/*
* Author: johan@anteeo.se
*
* Copyright (C) 2005 by Anteeo Systems HB, Sweden
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
* Created: Fri May 13 22:46:58 2005, johan@anteeo.se
*
*/
#define DDR_SPI DDRB
#define DD_MOSI PB3
#define DD_SCK PB5
// IMPORTANT to set DD_SS to output, otherwise SPI will not work reliably!
#define DD_SS PB2
#define DDR_13192CTRL DDRD
#define DR_13192CTRL PORTD
#define DD_CE PD4
#define DD_ATTN PD5
#define DD_RXTXEN PD6
#define DD_RST PD7
#define DSRC_INIT_OK _BV(0)
#define DSRC_SND _BV(1)
#define DSRC_RCV _BV(2)
// Receive with timeout
#define DSRC_RCVTMR _BV(3)
#define DSRC_CCA _BV(4)
#define DSRC_ABORTRCV _BV(5)
// This assumes the default prescaler (250kHz) in the MC13192 is used
// Timeout in 3ms
#define MC1319x_RCV_DEFAULT_TIMEOUT (0xFFFFFF/67)*0.003
#define MC13192_RX_PKT_RAM 0x01
#define MC13192_TX_PKT_RAM 0x02
#define MC13192_TX_PKT_CTL 0x03
#define cTX_PKT_LENGTH 0x7F
#define MC13192_IRQ_MASK 0x05
#define cSTRM_DATA_MASK _BV(10)
#define cPPL_LOCK_MASK _BV(9)
#define cDOZE_MASK _BV(4)
#define cTMR1_MASK _BV(0)
#define MC13192_CONTROL_A 0x06
#define cTX_STRM _BV(12)
#define cRX_STRM _BV(11)
#define cCCA_MASK _BV(10)
#define cTX_SENT_MASK _BV(9)
#define cRX_RCVD_MASK _BV(8)
#define cTMR_TRIG_EN _BV(7)
#define cCCA_TYPE _BV(5)|_BV(4)
#define cXCVR_SEQ _BV(1)|_BV(0)
#define MC13192_CONTROL_B 0x07
#define cTX_DONE_MASK _BV(7)
#define cRX_DONE_MASK _BV(6)
#define cUSE_STRM_MODE _BV(5)
#define MC13192_CONTROL_C 0x09
#define cGPIO_ALT_EN _BV(7) // GPIO1 and GPIO2 are used as status to the MCU
#define MC13192_LO1_INT_DIV 0x0F
#define cLO1_IDIV 0xFF
#define MC13192_LO1_NUM 0x10
#define cLO1_NUM 0xFFFF
#define MC13192_PA_LVL 0x12
#define cPA_LVL_COARSE _BV(7)|_BV(6)
#define cPA_LVL_FINE _BV(5)|_BV(4)
#define MC13192_TMR_CMP1_A 0x1b
#define MC13192_TMR_CMP1_B 0x1c
#define MC13192_IRQ_STATUS 0x24
#define cPLL_LOCK_IRQ _BV(15)
#define cTX_DONE_IRQ _BV(14)
#define cRX_DONE_IRQ _BV(13)
#define cSTRM_DATA_ERR_IRQ _BV(12)
#define cATTN_IRQ _BV(10)
#define cTMR1_IRQ _BV(8)
#define cRX_STRM_IRQ _BV(7)
#define cTX_STRM_IRQ _BV(6)
#define cCCA_IRQ _BV(5)
#define cCCA _BV(1)
#define cCRC_VALID _BV(0)
#define MC13192_CURRENT_TIME_A 0x26
#define MC13192_CURRENT_TIME_B 0x27
#define MC13192_RX_STATUS 0x2D
#define cCCA_FINAL 0xFF00
#define cRX_PKT_LATCH 0x7F
// Read/write bit in header. 0=write, 1=read
#define MC13192_HEADER_RW _BV(7)
extern void MC1319x_MCU_Init(void);
extern void MC13192_sendPacket(char size);
extern unsigned char MC13192_receivePacket(unsigned long timeout);
extern void packetSentCallback(void);
extern void packetReceivedCallback(void);
extern void rcvAbortedCallback(void);
extern void MC1319x_MCUenableInterrupts(void);
extern void MC13192Init(void);
extern unsigned long MC13192_getCurrentTime(void);
extern void CCAdoneCallback(char bBusy, char iPower);
extern unsigned char MC13192_doCCA(void);
extern void MC13192_setPower(unsigned char iPower);
extern void MC13192_setChannel(unsigned char iChannel);
extern unsigned short MC13192_timeToMs(unsigned long time);
extern char DSRC_Status;
extern char DSRC_ID;
// Packet buffer
extern unsigned char packetBuf[128];
// Position in the buffer
extern unsigned char packetPos;
// Size of the packet
extern unsigned char packetSize;
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