iolpc2129.h

ARMLPC2129ucosii283(uCOSII2.83已经移植到arm7,iar环境)

} __uartlsr_bits;

/* UART modem status register */
typedef union {
  //U1MSR
  struct {
  __REG8 DCTS             :1;
  __REG8 DDSR             :1;
  __REG8 TERI             :1;
  __REG8 DDCD             :1;
  __REG8 CTS              :1;
  __REG8 DSR              :1;
  __REG8 RI               :1;
  __REG8 DCD              :1;
  };
  //U1MSR
  struct {
  __REG8 MSR0             :1;
  __REG8 MSR1             :1;
  __REG8 MSR2             :1;
  __REG8 MSR3             :1;
  __REG8 MSR4             :1;
  __REG8 MSR5             :1;
  __REG8 MSR6             :1;
  __REG8 MSR7             :1;
  };
} __uartmsr_bits;


/* I2C control set register */
typedef struct {
  __REG32                 :2;
  __REG32 AA              :1;
  __REG32 SI              :1;
  __REG32 STO             :1;
  __REG32 STA             :1;
  __REG32 I2EN            :1;
  __REG32                 :25;
} __i2conset_bits;

/* I2C control clear register */
typedef struct {
  __REG32                 :2;
  __REG32 AAC             :1;
  __REG32 SIC             :1;
  __REG32                 :1;
  __REG32 STAC            :1;
  __REG32 I2ENC           :1;
  __REG32                 :25;
} __i2conclr_bits;

/* I2C status register */
typedef struct {
  __REG32 STATUS          :8;
  __REG32                 :24;
} __i2stat_bits;

/* I2C data register */
typedef struct {
  __REG32 DATA            :8;
  __REG32                 :24;
} __i2dat_bits;

/* I2C slave address register */
typedef struct {
  __REG32 GC              :1;
  __REG32 ADDR            :7;
  __REG32                 :24;
} __i2adr_bits;

/* I2C scl duty cycle register */
typedef struct {
  __REG32 COUNT           :16;
  __REG32                 :16;
} __i2scl_bits;


/* SPI control register */
typedef struct {
  __REG32                 :3;
  __REG32 CPHA            :1;
  __REG32 CPOL            :1;
  __REG32 MSTR            :1;
  __REG32 LSBF            :1;
  __REG32 SPIE            :1;
  __REG32                 :24;
} __spcr_bits;

/* SPI status register */
typedef struct {
  __REG32                 :3;
  __REG32 ABRT            :1;
  __REG32 MODF            :1;
  __REG32 ROVR            :1;
  __REG32 WCOL            :1;
  __REG32 SPIF            :1;
  __REG32                 :24;
} __spsr_bits;

/* SPI data register */
typedef struct {
  __REG32 DATA            :8;
  __REG32                 :24;
} __spdr_bits;

/* SPI clock counter register */
typedef struct {
  __REG32 COUNTER         :8;
  __REG32                 :24;
} __spccr_bits;

/* SPI interrupt register */
typedef struct {
  __REG32 SPIINT          :1;
  __REG32                 :31;
} __spint_bits;


/* CAN acceptance filter mode register */
typedef struct {
  __REG32 AccOff          :1;
  __REG32 AccBP           :1;
  __REG32 eFCAN           :1;
  __REG32                 :29;
} __afmr_bits;


/* CAN central transmit status register */
typedef struct {
  __REG32 TS              :2;
  __REG32                 :6;
  __REG32 TBS             :2;
  __REG32                 :6;
  __REG32 TCS             :2;
  __REG32                 :14;
} __cantxsr_bits;


/* CAN central receive status register */
typedef struct {
  __REG32 RS              :2;
  __REG32                 :6;
  __REG32 RBS             :2;
  __REG32                 :6;
  __REG32 DOS             :2;
  __REG32                 :14;
} __canrxsr_bits;


/* CAN miscellaneous status register */
typedef struct {
  __REG32 ES              :2;
  __REG32                 :6;
  __REG32 BS              :2;
  __REG32                 :22;
} __canmsr_bits;


/* CAN mode register */
typedef struct {
  __REG32 RM              :1;
  __REG32 LOM             :1;
  __REG32 STM             :1;
  __REG32 TPM             :1;
  __REG32 SM              :1;
  __REG32 RPM             :1;
  __REG32                 :1;
  __REG32 TM              :1;
  __REG32                 :24;
} __canmod_bits;


/* CAN command register */
typedef struct {
  __REG32 TR              :1;
  __REG32 AT              :1;
  __REG32 RRB             :1;
  __REG32 CDO             :1;
  __REG32 SRR             :1;
  __REG32 STB1            :1;
  __REG32 STB2            :1;
  __REG32 STB3            :1;
  __REG32                 :24;
} __cancmr_bits;


/* CAN global status register */
typedef struct {
  __REG32 RBS              :1;
  __REG32 DOS              :1;
  __REG32 TBS              :1;
  __REG32 TCS              :1;
  __REG32 RS               :1;
  __REG32 TS               :1;
  __REG32 ES               :1;
  __REG32 BS               :1;
  __REG32                  :8;
  __REG32 RXERR            :8;
  __REG32 TXERR            :8;
} __cangsr_bits;


/* CAN interrupt capture register */
typedef struct {
  __REG32 RI               :1;
  __REG32 TI1              :1;
  __REG32 EI               :1;
  __REG32 DOI              :1;
  __REG32 WUI              :1;
  __REG32 EPI              :1;
  __REG32 ALI              :1;
  __REG32 BEI              :1;
  __REG32 IDI              :1;
  __REG32 TI2              :1;
  __REG32 TI3              :1;
  __REG32                  :5;
  __REG32 ERRBIT           :5;
  __REG32 ERRDIR           :1;
  __REG32 ERRC             :2;
  __REG32 ALCBIT           :5;
  __REG32                  :3;
} __canicr_bits;


/* CAN interrupt enable register */
typedef struct {
  __REG32 RIE               :1;
  __REG32 TIE1              :1;
  __REG32 EIE               :1;
  __REG32 DOIE              :1;
  __REG32 WUIE              :1;
  __REG32 EPIE              :1;
  __REG32 ALIE              :1;
  __REG32 BEIE              :1;
  __REG32 IDIE              :1;
  __REG32 TIE2              :1;
  __REG32 TIE3              :1;
  __REG32                   :21;
} __canier_bits;


/* CAN bus timing register */
typedef struct {
  __REG32 BRP                :10;
  __REG32                    :4;
  __REG32 SJW                :2;
  __REG32 TSEG1              :4;
  __REG32 TSEG2              :3;
  __REG32 SAM                :1;
  __REG32                    :8;
} __canbtr_bits;


/* CAN error warning limit register */
typedef struct {
  __REG32 EWL                :8;
  __REG32                    :24;
} __canewl_bits;


/* CAN status register */
typedef struct {
  __REG32 RBS                :1;
  __REG32 DOS                :1;
  __REG32 TBS1               :1;
  __REG32 TCS1               :1;
  __REG32 RS                 :1;
  __REG32 TS1                :1;
  __REG32 ES                 :1;
  __REG32 BS                 :1;
  __REG32 /*RBS*/            :1;
  __REG32 /*DOS*/            :1;
  __REG32 TBS2               :1;
  __REG32 TCS2               :1;
  __REG32 /*RS*/             :1;
  __REG32 TS2                :1;
  __REG32 /*ES*/             :1;
  __REG32 /*BS*/             :1;
  __REG32 /*RBS*/            :1;
  __REG32 /*DOS*/            :1;
  __REG32 TBS3               :1;
  __REG32 TCS3               :1;
  __REG32 /*RS*/             :1;
  __REG32 TS3                :1;
  __REG32 /*ES*/             :1;
  __REG32 /*BS*/             :1;
  __REG32                    :8;
} __cansr_bits;


/* CAN rx frame status register */
typedef struct {
  __REG32 IDIndex            :10;
  __REG32 BP                 :1;
  __REG32                    :5;
  __REG32 DLC                :4;
  __REG32                    :10;
  __REG32 RTR                :1;
  __REG32 FF                 :1;
} __canrfs_bits;


/* CAN rx identifier register */
typedef union {
  //CxRID
  struct {
   __REG32 ID10_0             :11;
   __REG32                    :21;
  };
  //CxRID
  struct {
   __REG32 ID29_18            :11;
   __REG32                    :21;
  };
  //CxRID
  struct {
   __REG32 ID29_0             :29;
   __REG32                    :3;
  };
} __canrid_bits;


/* CAN rx data register A */
typedef struct {
  __REG32 Data1               :8;
  __REG32 Data2               :8;
  __REG32 Data3               :8;
  __REG32 Data4               :8;
} __canrda_bits;


/* CAN rx data register B */
typedef struct {
  __REG32 Data5               :8;
  __REG32 Data6               :8;
  __REG32 Data7               :8;
  __REG32 Data8               :8;
} __canrdb_bits;


/* CAN tx frame information register */
typedef struct {
  __REG32 PRIO              :8;
  __REG32                   :8;
  __REG32 DLC               :4;
  __REG32                   :10;
  __REG32 RTR               :1;
  __REG32 FF                :1;
} __cantfi_bits;


/* CAN tx identifier register */
typedef union {
  //CxTIDy
  struct {
   __REG32 ID10_0             :11;
   __REG32                    :21;
  };
  //CxTIDy
  struct {
   __REG32 ID29_18            :11;
   __REG32                    :21;
  };
  //CxTIDy
  struct {
   __REG32 ID29_0             :29;
   __REG32                    :3;
  };
} __cantid_bits;


/* CAN tx data register A */
typedef struct {
  __REG32 Data1               :8;
  __REG32 Data2               :8;
  __REG32 Data3               :8;
  __REG32 Data4               :8;
} __cantda_bits;


/* CAN tx data register B */
typedef struct {
  __REG32 Data5               :8;
  __REG32 Data6               :8;
  __REG32 Data7               :8;
  __REG32 Data8               :8;
} __cantdb_bits;


/* TIMER interrupt register */
typedef struct {
  __REG32 MR0INT          :1;